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參數資料
| 型號： | AD9992BBCZRL |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 消費家電 |
| 英文描述： | 12-Bit CCD Signal Processor with Precision Timing Generator |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PBGA105 |
| 封裝： | 8 X 8 MM, 0.65 MM PITCH, ROHS COMPLIANT, MO-225, CSPBGA-105 |
| 文件頁數： | 2/92頁 |
| 文件大小： | 718K |
| 代理商： | AD9992BBCZRL |
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AD9992
TABLE OF CONTENTS
Rev. 0 | Page 2 of 92
Features..............................................................................................1
Applications.......................................................................................1
General Description.........................................................................1
Functional Block Diagram..............................................................1
Specifications.....................................................................................3
Digital Specifications ................................................................... 4
Analog Specifications................................................................... 5
Timing Specifications ..................................................................6
Absolute Maximum Ratings............................................................7
Package Thermal Characteristics...............................................7
ESD Caution..................................................................................7
Pin Configuration and Function Descriptions.............................8
Terminology....................................................................................10
Typical Performance Characteristics...........................................11
Equivalent Circuits.........................................................................12
System Overview............................................................................13
High Speed
Precision Timing
Core...........................................14
Horizontal Clamping and Blanking.........................................18
Horizontal Timing Sequence Example....................................24
Vertical Timing Generation......................................................26
Vertical Sequences (VSEQ).......................................................29
Vertical Timing Example...........................................................45
Shutter Timing Control............................................................. 47
Substrate Clock Operation (SUBCK)...................................... 47
Field Counters............................................................................. 50
General-Purpose Outputs (GPO
S
) .......................................... 51
GP Look-Up Tables (LUT)........................................................55
Complete Exposure/Readout Operation
Using Primary Counter and GPO Signals.............................. 56
Manual Shutter Operation Using Enhanced SYNC Modes....58
Analog Front-End Description and Operation...................... 62
Power-Up Sequence for Master Mode..................................... 64
Standby Mode Operation.......................................................... 68
CLI Frequency Change..............................................................68
Circuit Layout Information........................................................... 70
Serial Interface Timing.............................................................. 73
Layout of Internal Registers...................................................... 74
Updating New Register Values................................................. 75
Complete Register Listing............................................................. 76
Outline Dimensions....................................................................... 90
Ordering Guide .......................................................................... 90
REVISION HISTORY
1/06—Revision 0: Initial Version
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