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參數資料
| 型號： | AD9992BBCZRL |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 消費家電 |
| 英文描述： | 12-Bit CCD Signal Processor with Precision Timing Generator |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PBGA105 |
| 封裝： | 8 X 8 MM, 0.65 MM PITCH, ROHS COMPLIANT, MO-225, CSPBGA-105 |
| 文件頁數： | 32/92頁 |
| 文件大小： | 718K |
| 代理商： | AD9992BBCZRL |
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AD9992
Rev. 0 | Page 32 of 92
V1
V8
HD
V9
V10
V1 TO V8 USE
V-PATTERN GROUP A
V9, V10 USE
V-PATTERN GROUP B
0
Figure 35. Using Separate Group A and Group B Patterns
V1
V24
HD
V-PATTERN GROUP A
V-PATTERN GROUP B
V-PATTERN GROUP C
V-PATTERN GROUP D
0
Figure 36. Combining Multiple V-Patterns Using CONCAT_GRP = 1
V1
V10
HD
V-PATTERN GROUP A
V-PATTERN GROUP B
GROUP A REP 1
GROUP A REP 2
GROUP A REP 3
0
Figure 37. Combining Group A and Group B Patterns with Repetition
Group A/Group B/Group C/Group D Selection
The AD9992 has the flexibility to use four different V-pattern
groups in a vertical sequence. In general, the vertical outputs
use the same V-pattern group during a particular sequence. It
is possible to assign some of the outputs to a different V-pattern
group, which can be useful in certain CCD readout modes.
The GROUPSEL registers are used to select Group A, Group B,
Group C, or Group D for each V-output. In general, only a
single V-pattern group is needed for the vertical outputs;
therefore, Group A should be selected for all outputs by default
(GROUPSEL_0, GROUPSEL_1 = 0x00). In this configuration,
all outputs use the V-pattern group specified by the VPATSELA
register.
If additional flexibility is needed, some outputs can be set to
Group B, Group C, or Group D in the GROUPSEL registers. In
this case, those selected outputs use the V-pattern group
specified by the VPATSELB, VPATSELC, or VPATSELD
registers. Figure 35 shows an example where outputs V9 and
V10 are using a separate V-Pattern Group B to perform special
CCD timing.
Another application of the Group A, Group B, Group C, and
Group D registers is to combine up to four different V-pattern
groups together for more complex patterns. This is accom-
plished by setting the CONCAT_GRP register (Address 0x00,
Bits [13:10]) equal to 0x01. This setting combines the toggle
positions from the V-pattern groups specified by registers
VPATSELA, VPATSELB, VPATSELC, and VPATSELD for a
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相關代理商/技術參數 |
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| AD9993BBCZ | 功能描述:IC MIXED-SIGNAL FRONT END 196BGA 制造商:analog devices inc. 系列:- 包裝:托盤 零件狀態:在售 類型:ADC，DAC 輸入類型:LVDS 輸出類型:LVDS 接口:SPI 電流 - 電源:- 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:196-LFBGA，CSPBGA 供應商器件封裝:196-CSPBGA（12x12） 標準包裝:1 |
| AD9993BBCZRL | 功能描述:IC MIXED-SIGNAL FRONT END 196BGA 制造商:analog devices inc. 系列:- 包裝:帶卷（TR） 零件狀態:在售 類型:ADC，DAC 輸入類型:LVDS 輸出類型:LVDS 接口:SPI 電流 - 電源:- 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:196-LFBGA，CSPBGA 供應商器件封裝:196-CSPBGA（12x12） 標準包裝:1,500 |
| AD9993-EBZ | 功能描述:EVAL BOARD MXFE AD9993 制造商:analog devices inc. 系列:* 零件狀態:在售 標準包裝:1 |
| AD9994 | 制造商:AD 制造商全稱:Analog Devices 功能描述:12-Bit CCD Signal Processor with Precision Timing Generator |
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