欧美成人免费电影,国产欧美一区二区三区精品酒店,精品国产a毛片,色网在线免费观看

參數資料
型號: AD9992BBCZRL
廠商: ANALOG DEVICES INC
元件分類: 消費家電
英文描述: 12-Bit CCD Signal Processor with Precision Timing Generator
中文描述: SPECIALTY CONSUMER CIRCUIT, PBGA105
封裝: 8 X 8 MM, 0.65 MM PITCH, ROHS COMPLIANT, MO-225, CSPBGA-105
文件頁數: 89/92頁
文件大小: 718K
代理商: AD9992BBCZRL
AD9992
Table 41. Field Registers
Data
Bits
00
[4:0]
[9:5]
[14:10]
[19:15]
[24:20]
01
[4:0]
[9:5]
[14:10]
[19:15]
[21:20]
Rev. 0 | Page 89 of 92
Address
Default
Value
X
X
X
X
X
X
X
X
X
Update
Type
VD
VD
Name
SEQ0
SEQ1
SEQ2
SEQ3
SEQ4
SEQ5
SEQ6
SEQ7
SEQ8
MULT_SWEEP0
Description
Selected V-sequence for first region in the field.
Selected V-sequence for second region in the field.
Selected V-sequence for third region in the field.
Selected V-sequence for fourth region in the field.
Selected V-sequence for fifth region in the field.
Selected V-sequence for sixth region in the field.
Selected V-sequence for seventh region in the field.
Selected V-sequence for eighth region in the field.
Selected V-sequence for ninth region in the field.
Enables multiplier mode and/or sweep mode for Region 0.
0: multiplier off/sweep off; 1: multiplier off/sweep on;
2: multiplier on/sweep off; 3: multiplier on/sweep on.
Enables multiplier mode and/or sweep mode for Region 2.
Enables multiplier mode and/or sweep mode for Region 1.
HD last line length. Line length of last line in the field.
Enables multiplier mode and/or sweep mode for Region 3.
Enables multiplier mode and/or sweep mode for Region 4.
Enables multiplier mode and/or sweep mode for Region 5.
Enables multiplier mode and/or sweep mode for Region 6.
Enables multiplier mode and/or sweep mode for Region 7.
Enables multiplier mode and/or sweep mode for Region 8.
HD last line length Bit [13] when 14-bit H-counter is enabled.
V-Sequence Change Position 0.
V-Sequence Change Position 1.
V-Sequence Change Position 2.
V-Sequence Change Position 3.
V-Sequence Change Position 4.
V-Sequence Change Position 5.
V-Sequence Change Position 6.
V-Sequence Change Position 7.
V-Sequence Change Position 8.
VD field length (number of lines in the field).
SG Active Line 1.
SG Active Line 2 (set to SG Active Line 1 or maximum if not
used).
Masking of VSG outputs during SG active line.
CLPOB Mask Region 1 start position. Set to 8191 to disable.
CLPOB Mask Region 1 end position. Set to 0 to disable.
CLPOB Mask Region 2 start position. Set to 8191 to disable.
CLPOB Mask Region 2 end position. Set to 0 to disable.
CLPOB Mask Region 3 start position. Set to 8191 to disable.
CLPOB Mask Region 3 end position. Set to 0 to disable.
PBLK Mask Region 1 start position. Set to 8191 to disable.
PBLK Mask Region 1 end position. Set to 0 to disable.
PBLK Mask Region 2 start position. Set to 8191 to disable.
PBLK Mask Region 2 end position. Set to 0 to disable.
PBLK Mask Region 3 start position. Set to 8191 to disable.
PBLK Mask Region 3 end position. Set to 0 to disable.
02
03
04
05
06
07
08
[23:22]
[25:24]
[12:0]
[14:13]
[16:15]
[18:17]
[20:19]
[22:21]
[24:23]
[25]
[12:0]
[25:13]
[12:0]
[25:13]
[12:0]
[25:13]
[12:0]
[25:13]
[12:0]
[25:13]
[12:0]
[25:13]
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
VD
VD
VD
VD
VD
VD
VD
MULT_SWEEP1
MULT_SWEEP2
HDLASTLEN
MULT_SWEEP3
MULT_SWEEP4
MULT_SWEEP5
MULT_SWEEP6
MULT_SWEEP7
MULT_SWEEP8
HDLASTLEN_13
SCP0
SCP1
SCP2
SCP3
SCP4
SCP5
SCP6
SCP7
SCP8
VDLEN
SGACTLINE1
SGACTLINE2
09
0A
0B
0C
0D
0E
0F
[23:0]
[12:0]
[25:13]
[12:0]
[25:13]
[12:0]
[25:13]
[12:0]
[25:13]
[12:0]
[25:13]
[12:0]
[25:13]
X
X
X
X
X
X
X
X
X
X
X
X
X
VD
VD
VD
VD
VD
VD
VD
SGMASK
CLPMASKSTART1
CLPMASKEND1
CLPMASKSTART2
CLPMASKEND2
CLPMASKSTART3
CLPMASKEND3
PBLKMASKSTART1
PBLKMASKEND1
PBLKMASKSTART2
PBLKMASKEND2
PBLKMASKSTART3
PBLKMASKEND3
相關PDF資料
PDF描述
AD9995KCP 12-Bit CCD Signal Processor with Precision Timing ⑩ Generator
AD9995KCPRL 12-Bit CCD Signal Processor with Precision Timing ⑩ Generator
AD9995 12-Bit CCD Signal Processor with Precision Timing ⑩ Generator
ADA4000-2ARMZ-RL Low Cost, Precision JFET Input Operational Amplifiers
ADA4000-1 Low Cost, Precision JFET Input Operational Amplifiers
相關代理商/技術參數
參數描述
AD9993BBCZ 功能描述:IC MIXED-SIGNAL FRONT END 196BGA 制造商:analog devices inc. 系列:- 包裝:托盤 零件狀態:在售 類型:ADC,DAC 輸入類型:LVDS 輸出類型:LVDS 接口:SPI 電流 - 電源:- 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:196-LFBGA,CSPBGA 供應商器件封裝:196-CSPBGA(12x12) 標準包裝:1
AD9993BBCZRL 功能描述:IC MIXED-SIGNAL FRONT END 196BGA 制造商:analog devices inc. 系列:- 包裝:帶卷(TR) 零件狀態:在售 類型:ADC,DAC 輸入類型:LVDS 輸出類型:LVDS 接口:SPI 電流 - 電源:- 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:196-LFBGA,CSPBGA 供應商器件封裝:196-CSPBGA(12x12) 標準包裝:1,500
AD9993-EBZ 功能描述:EVAL BOARD MXFE AD9993 制造商:analog devices inc. 系列:* 零件狀態:在售 標準包裝:1
AD9994 制造商:AD 制造商全稱:Analog Devices 功能描述:12-Bit CCD Signal Processor with Precision Timing Generator
AD9994BCP 制造商:Analog Devices 功能描述:AFE GEN PURPOSE 12-BIT 64LFCSP - Bulk
主站蜘蛛池模板: 任丘市| 方山县| 扎鲁特旗| 冷水江市| 高碑店市| 达孜县| 夹江县| 财经| 宁南县| 澜沧| 孟津县| 亳州市| 武强县| 镇宁| 梨树县| 镇雄县| 旅游| 蕉岭县| 翼城县| 柘荣县| 嵩明县| 花莲市| 南澳县| 射洪县| 永平县| 大冶市| 玉树县| 调兵山市| 姜堰市| 乌什县| 淳化县| 定结县| 温州市| 子长县| 湾仔区| 茌平县| 乐亭县| 出国| 贡山| 长沙市| 龙胜|