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參數資料
| 型號： | GS1559-CBE2 |
| 廠商： | Gennum Corporation |
| 英文描述： | GS1559 HD-LINX-TM II Multi-Rate Deserializer with Loop-Through Cable Driver |
| 中文描述： | GS1559的HD - LINX進程，商標第二多速率解串器與環通電纜驅動器 |
| 文件頁數： | 4/74頁 |
| 文件大小： | 686K |
| 代理商： | GS1559-CBE2 |
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GS1559 Data Sheet
30572 - 4
July 2005
4 of 74
4.8.2 Status Signal Outputs.........................................................................41
4.9 Data Through Mode......................................................................................42
4.10 Additional Processing Functions.................................................................42
4.10.1 FIFO Load Pulse...............................................................................42
4.10.2 Ancillary Data Detection and Indication............................................43
4.10.3 SMPTE 352M Payload Identifier.......................................................46
4.10.4 Automatic Video Standard and Data Format Detection....................47
4.10.5 Error Detection and Indication ..........................................................51
4.10.6 Error Correction and Insertion ..........................................................57
4.10.7 EDH Flag Detection..........................................................................59
4.11 Parallel Data Outputs..................................................................................61
4.11.1 Parallel Data Bus Buffers..................................................................61
4.11.2 Parallel Output in SMPTE Mode.......................................................62
4.11.3 Parallel Output in DVB-ASI Mode.....................................................62
4.11.4 Parallel Output in Data-Through Mode.............................................62
4.11.5 Parallel Output Clock (PCLK) ...........................................................63
4.12 GSPI Host Interface....................................................................................64
4.12.1 Command Word Description.............................................................64
4.12.2 Data Read and Write Timing ............................................................65
4.12.3 Configuration and Status Registers..................................................66
4.13 JTAG...........................................................................................................67
4.14 Device Power Up ........................................................................................68
4.15 Device Reset...............................................................................................68
5. Application Reference Design................................................................................69
5.1 Typical Application Circuit (Part A) ...............................................................69
5.2 Typical Application Circuit (Part B) ...............................................................70
6. References & Relevant Standards.........................................................................71
7. Package & Ordering Information............................................................................72
7.1 Package Dimensions ....................................................................................72
7.2 Packaging Data.............................................................................................73
7.3 Ordering Information.....................................................................................73
8. Revision History .....................................................................................................74
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