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參數資料
| 型號： | GS1559-CBE2 |
| 廠商： | Gennum Corporation |
| 英文描述： | GS1559 HD-LINX-TM II Multi-Rate Deserializer with Loop-Through Cable Driver |
| 中文描述： | GS1559的HD - LINX進程，商標第二多速率解串器與環通電纜驅動器 |
| 文件頁數： | 53/74頁 |
| 文件大小： | 686K |
| 代理商： | GS1559-CBE2 |
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GS1559 Data Sheet
30572 - 4
July 2005
53 of 74
4.10.5.1 Video Standard Error Detection
If a mismatch between the received SMPTE 352M packets and the calculated
video standard occurs, the GS1559 will indicate a video standard error by setting
the VD_STD_ERR bit of the ERROR_STATUS register HIGH.
4.10.5.2 EDH CRC Error Detection
The GS1559 calculates Full Field (FF) and Active Picture (AP) CRC words
according to SMPTE RP165 in support of Error Detection and Handling packets in
SD signals.
These calculated CRC values are compared with the received CRC values. If a
mismatch is detected, the error is flagged in the AP_CRC_ERR and/or
FF_CRC_ERR bits of the ERROR_STATUS register. These two flags are shared
between fields 1 and 2.
The AP_CRC_ERR bit will be set HIGH when an active picture CRC mismatch has
been detected in field 1 or 2. The FF_CRC_ERR bit will be set HIGH when a full
field CRC mismatch has been detected in field 1 or 2.
EDH CRC errors will only be indicated when the device is operating in SD mode
(SD/HD = HIGH), and when the device has correctly received EDH packets.
SMPTE RP165 specifies the calculation ranges and scope of EDH data for
standard 525 and 625 component digital interfaces. The GS1559 will utilize these
standard ranges by default.
Table 4-12: Host Interface Description for Error Mask Register
Register Name
Bit
Name
Description
R/W
Default
ERROR_MASK
Address: 01Ah
15-11
–
Not Used.
–
–
10
VD_STD_ERR_MASK
Video Standard Error Flag Mask bit.
R/W
0
9
FF_CRC_ERR_MASK
Full Field CRC Error Flag Mask bit.
R/W
0
8
AP_CRC_ERR_MASK
Active Picture CRC Error Flag Mask bit.
R/W
0
7
LOCK_ERR_MASK
Lock Error Flag Mask bit.
R/W
0
6
CCS_ERR_MASK
Chroma Checksum Error Flag Mask bit.
R/W
0
5
YCS_ERR_MASK
Luma Checksum Error Flag Mask bit.
R/W
0
4
CCRC_ERR_MASK
Chroma CRC Error Flag Mask bit.
R/W
0
3
YCRC_ERR_MASK
Luma CRC Error Flag Mask bit.
R/W
0
2
LNUM_ERR_MASK
Line Number Error Flag Mask bit.
R/W
0
1
SAV_ERR_MASK
Start of Active Video Error Flag Mask bit.
R/W
0
0
EAV_ERR_MASK
End of Active Video Error Flag Mask bit.
R/W
0
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