- 您現在的位置：買賣IC網 > PDF目錄365968 > TSB12LV22PZP (Texas Instruments, Inc.) OHCI-Lynx PCI-BASED IEEE 1394 HOST CONTROLLER PDF資料下載
參數資料
| 型號： | TSB12LV22PZP |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | OHCI-Lynx PCI-BASED IEEE 1394 HOST CONTROLLER |
| 中文描述： | OHCI的山貓基于PCI的1394主控制器 |
| 文件頁數： | 64/106頁 |
| 文件大?。?/td> | 605K |
| 代理商： | TSB12LV22PZP |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁當前第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁
5
–
8
5.1.3.2
Asynchronous Packet Receive With Headers and Trailer
Step 1:
Asynchronous packet is received through the receiver logic of the link core.
Step 2:
The header quadlets are loaded into their respective header registers AND routed to the
DM port without any buffering.
Step 3:
Packet data is routed directly to the DM port (no buffering performed).
Step 4:
Trailer quadlet is loaded into the trailer register at 48h.
CFR REGISTER
Step 1
Header0 Register at 38h
Trailer Register at 48h
LINK CORE
Transmitter
Receiver
Quadlet#0
Packet received
from 1394 bus
through the Phy
Header1 Register at 3Ch
Quadlet#1
Header2 Register at 40h
Quadlet#2
Header3 Register at 42h
Quadlet#3
Loaded only in
Block Receive
Data
Mover
Port
Step 4 (trailer quadlet)
Step 3 (packet data)
Step 2 (header quadlet)
Figure 5
–
10. Asynchronous Receive With Headers and Trailer
5.1.4
There are two ways (modes of operation) to transmit asynchronous data through the data mover:
Asynchronous Transmit
Asynchronous packet transmit with automatic header insertion.
Asynchronous packet transmit without automatic header insertion.
The difference between the two modes lies in the mechanism in which the header information is inserted
into the data stream. However, in both cases, the header information is always loaded into the link core
transmitter from the header registers.
相關PDF資料 |
PDF描述 |
|---|---|
| TSB12LV26PZ | OHCI-Lynx PCI-BASED IEEE 1394 HOST CONTROLLER |
| TSB14AA1 | FPGA (Field-Programmable Gate Array) |
| TSB14AA1I | FPGA (Field-Programmable Gate Array) |
| TSB14AA1T | FPGA (Field-Programmable Gate Array) |
| TSB14C01MHV | IC APEX 20KE FPGA 160K 484-FBGA |
相關代理商/技術參數 |
參數描述 |
|---|---|
| TSB12LV23 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:TSB12LV23 OHCI-Lynx PCI-Based IEEE 1394 Host Controller |
| TSB12LV23PZ | 制造商:TI 制造商全稱:Texas Instruments 功能描述:TSB12LV23 OHCI-Lynx PCI-Based IEEE 1394 Host Controller |
| TSB12LV26 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:OHCI-Lynx PCI-BASED IEEE 1394 HOST CONTROLLER |
| TSB12LV26-EP | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Military Enhanced Plastic OHCI-Lynx PCI-Based IEEE 1394 Host Controller |
| TSB12LV26IPZT | 功能描述:1394 接口集成電路 OHCI-Lynx PCI-Based Host Controller RoHS:否 制造商:Texas Instruments 類型:Link Layer Controller 工作電源電壓: 封裝 / 箱體:LQFP 封裝:Tray |
發(fā)布緊急采購，3分鐘左右您將得到回復。