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參數資料
型號: TSB12LV22PZP
廠商: Texas Instruments, Inc.
英文描述: OHCI-Lynx PCI-BASED IEEE 1394 HOST CONTROLLER
中文描述: OHCI的山貓基于PCI的1394主控制器
文件頁數: 92/106頁
文件大小: 605K
代理商: TSB12LV22PZP
7
14
The cable Phy sends one to three self-ID packets at the base rate (100 Mbits/s) during the self-ID phase
of arbitration or in response to a ping packet. The number of self-ID packets sent depends on the number
of ports. Figures 7
19, 7
20, and 7
21 show the format of the cable Phy self-ID packets. Inside the GRF,
the first received quadlet of a self-ID packet is always 0000_00E0h, and the final quadlet is always the
quadlet containing the acknowledgement code.
3
2
1
0
7
6
5
4
11
10
9
8
15
14
13
12
19
18
20 21
31
30
29
28
27
26
25
24
23
22
0
1
Phy_ID
p2
p1
p0
pwr
rsv
sp
17
16
Logical inverse of first quadlet
L
0
gap_cnt
c
m
i
Figure 7
19. Phy Self-ID Packet #0 Format
3
2
1
0
7
6
5
4
11
10
9
8
15
14
13
12
19
18
20 21
31
30
29
28
27
26
25
24
23
22
0
1
Phy_ID
p10
p9
p8
rsv
17
16
Logical inverse of first quadlet
n(0)
1
m
r
p3
p4
p5
p6
p7
Figure 7
20. Phy Self-ID Packet #1 Format
3
2
1
0
7
6
5
4
11
10
9
8
15
14
13
12
19
18
20 21
31
30
29
28
27
26
25
24
23
22
0
1
Phy_ID
reserved
rsv
17
16
Logical inverse of first quadlet
n(1)
1
p11
p12
p13
p14
p15
Figure 7
21. Phy Self-ID Packet #2 Format
When there is only one node (i.e., one Phy/link pair) on the bus, following a bus reset, the GRF contains
0000_00E0h and the acknowledge quadlet only.
Example:
If there are three 1394.a compliant nodes on the bus, each with a Phy containing three or less
ports, the GRF of any one of the links is shown below. The FULLSID bit is assumed to be set
in this example.
GRF CONTENTS
DESCRIPTION
0000_00E0h
Header quadlet for Self-ID Phy packet
Self-ID1
Self_ID quadlet for Phy #1
Self-ID1 (inverse)
Logical inverse quadlet for Self_ID of Phy #1
Self-ID2
Self_ID quadlet for Phy #2
Self-ID2 (inverse)
Logical inverse quadlet for Self_ID of Phy #2
Self-ID3
Self_ID quadlet for Phy #3
Self-ID3 (inverse)
Logical inverse quadlet for Self_ID of Phy #3
0000_000_ACK
GRF contents (following a bus reset) with three nodes on the bus
Trailing acknowledgement quadlet
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