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參數資料
| 型號： | UCB1500 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 總線控制器 |
| 英文描述： | PCI to AC97 bridge/host controller |
| 中文描述： | PCI BUS CONTROLLER, PQFP80 |
| 封裝： | 12 X 12 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-315-1, LQFP-80 |
| 文件頁數： | 20/58頁 |
| 文件大小： | 1001K |
| 代理商： | UCB1500 |
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Philips Semiconductors
UCB1500
PCI to AC97 bridge/host controller
Objective specification
Rev. 01 — 4 February 2000
20 of 58
9397 750 06854
Philips Electronics N.V. 2000. All rights reserved.
8.
Control Registers
To access any of the registers listed below, HOST needs to:
I/O write 8-bit data to the index port.
Read 8/16 bits from data port or write 8/16 bits to data port.
Data and Index Port Addresses are as follows:
Data Port = base address + 0h
Index Port = base address + 2h
All registers bits default to a value of 0 at power-up, unless otherwise stated. Sticky
bits initially have unknown values at power-up, and retain programmed values if V
AUX
is available.
In addition to the Data port and the Index port, there are also status ports 1 and 2.
These ports can be used for interrupt handling. See section on interrupts for details.
The status port addresses are as follows:
Status port1 = base address + 4h (DMA status)
Status port2 = base address + ch (AC97 status)
Remark:
Base address is specified in register 10h of the PCI configuration space. All
registers are word-based, accessible by HOST. All registers are read/write registers,
unless specified otherwise by the following notation: (r) = read only, (w) = write only.
Unless sticky or otherwise stated, all read/write registers default to zero at PCI reset.
All reserved or unimplemented registers are hardwired to 0.
Function 0 and Function 1 registers can be accessed through the specified I/O base
address programmed into register 10h. Even though function 0 and function 1 can
access the registers through different I/O addresses, there is only one physical set of
control registers for both functions. As a result of this, if function 0 writes to register 0
for example, followed by function 1 write to register 0, then if function 0 reads
register 0, it will get the value written by function 1.
8.1 DMA Registers
8.1.1
[0000-000F] Reserved.
8.1.2
[0010]: Receive DMA #1 Descriptor Table Pointer (DTP) register
Table 24: Receive DMA #1 DPT register bit description
Bit
Description
15-3
Descriptor Table Pointer [15:3]
Bits 15-3 of receive DMA #1 Descriptor Table Pointer. 32-bit DTP points to
location of descriptor table in local memory.
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