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參數(shù)資料
| 型號： | UCB1500 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 總線控制器 |
| 英文描述： | PCI to AC97 bridge/host controller |
| 中文描述： | PCI BUS CONTROLLER, PQFP80 |
| 封裝： | 12 X 12 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-315-1, LQFP-80 |
| 文件頁數(shù)： | 32/58頁 |
| 文件大小： | 1001K |
| 代理商： | UCB1500 |
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Philips Semiconductors
UCB1500
PCI to AC97 bridge/host controller
Objective specification
Rev. 01 — 4 February 2000
32 of 58
9397 750 06854
Philips Electronics N.V. 2000. All rights reserved.
8.5 DMA counter control
8.5.1
[00a0]: Counter control/status for channel #1
8.5.2
[00a1-00af]: Reserved.
8.5.3
[00b0]: Counter control/status for channel #0
8.5.4
[00b1-00bf]: Reserved
8.6 AC-97 registers
8.6.1
[00c0]: AC97 DMA Channel 0 rate
Table 48: Counter control/status for channel #1 register bit description
Bit
Description
15-1
Reserved.
0
General counter #0 overflow
Indicates general purpose counter #0 (reg 62h) overflow if set.
Table 49: Counter control/status for channel #0 register bit description
Bit
Description
15-1
Reserved.
0
General counter #1 overflow
Indicates general purpose counter #1 (reg 65h) overflow if set.
Table 50: AC97 DMA channel 0 rate register bit description
Bit
Description
15-8
Receive rate
Used to specify receive sample rate for receive channel #0.
Rate = 48 kHz * Receive rate / 256
For example, if set to 80h, every other AC97 received frame will be discarded by
UCB1500.
00h = 256 (default mode = 48 kHz)
ffh = 255
7-0
Transmit rate
Used to specify transmit sample rate for transmit channel #0.
Rate = 48 kHz * Transmit rate / 256
For example, if set to 80h, every other AC97 frame transmitted will contain valid
data.
00h = 256 (default mode = 48 kHz)
ffh = 255
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