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參數資料
| 型號： | UCB1500 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 總線控制器 |
| 英文描述： | PCI to AC97 bridge/host controller |
| 中文描述： | PCI BUS CONTROLLER, PQFP80 |
| 封裝： | 12 X 12 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-315-1, LQFP-80 |
| 文件頁數： | 34/58頁 |
| 文件大小： | 1001K |
| 代理商： | UCB1500 |
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Philips Semiconductors
UCB1500
PCI to AC97 bridge/host controller
Objective specification
Rev. 01 — 4 February 2000
34 of 58
9397 750 06854
Philips Electronics N.V. 2000. All rights reserved.
8.6.3
[00c2]: DMA Channel 0 input slot enable / miscellaneous
Table 52: DMA Channel 0 input slot enable / miscellaneous register bit description
Bit
Description
15
Reserved.
14
PCM left/right channel bind
If set, receive channel #0 DMA will store data received on AC97 slot 3 and 4
together in such a way that bits[3-0] of slot 3 and bits[19-16] of slot 4 will be
stored as 1 byte.
13-12
Reserved.
11-10
Handset ADC input slot enable
Enables receive channel #0 DMA to store data received on AC97 slot 11.
(Same encoding as bits 1-0.)
9-8
Microphone ADC input slot enable
Enables receive channel #0 DMA to store data received on AC97 slot 6.
(Same encoding as bits 1-0.)
7-6
Line 2 ADC input slot enable
Enables receive channel #0 DMA to store data received on AC97 slot 10.
(Same encoding as bits 1-0.)
5-4
Line 1 ADC input slot enable
Enables receive channel #0 DMA to store data received on AC97 slot 5.
(Same encoding as bits 1-0.)
3-2
PCM right channel input slot enable
Enables receive channel #0 DMA to store data received on AC97 slot 4.
(Same encoding as bits 1-0.)
1-0
PCM left channel input slot enable
Enables receive channel #0 DMA to store data received on AC97 slot 3.
00 = disable
01 = store 16-bits
10 = store 18-bits
11 = store 20-bits
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