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參數(shù)資料
| 型號(hào)： | UCB1500 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 總線控制器 |
| 英文描述： | PCI to AC97 bridge/host controller |
| 中文描述： | PCI BUS CONTROLLER, PQFP80 |
| 封裝： | 12 X 12 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-315-1, LQFP-80 |
| 文件頁數(shù)： | 4/58頁 |
| 文件大小： | 1001K |
| 代理商： | UCB1500 |
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Philips Semiconductors
UCB1500
PCI to AC97 bridge/host controller
Objective specification
Rev. 01 — 4 February 2000
4 of 58
9397 750 06854
Philips Electronics N.V. 2000. All rights reserved.
[1]
S/T/S: Sustained Tri-State is an active-LOW tri-state signal owned and driven by one agent at a time. The agent that drives an S/T/S pin
LOW must drive it HIGH for at least one clock before letting it float. A new agent cannot start driving a S/T/S signal any sooner than one
clock after the previous owner tri-states it.
O/D: Open Drain allows multiple devices to share as a wired OR.
[2]
IRDY
TRDY
DEVSEL
STOP
IDSEL
AD[31:0]
30
31
33
34
15
4, 5, 7, 8, 9, 10, 12,
13, 17, 18, 19, 20,
23, 24, 25, 26,41,
42, 44, 45, 46, 47,
49, 50, 52, 54, 55,
56, 57, 59, 60, 62
14, 28, 39, 51
38
77
63
S/T/S
S/T/S
S/T/S
S/T/S
I
T/S
PCI IRDY, input during slave, output during master.
PCI TRDY, output during slave, input during master.
PCI DEVSEL, output during slave, input during master.
PCI STOP, output during slave, input during master.
PCI IDSEL signal.
PCI address/data.
slave mode: output only during data read phase.
master mode: output during address phase and data write phase.
CBE[3:0]
PAR
INTA
PME
T/S
T/S
O/D
[2]
O/D
PCI command/byte-enable, input during slave, output during master.
PCI parity.
PCI interrupt.
Open drain, V
AUX
powered PCI power management pin. SDA TAIN[1:0]
pins are V
AUX
powered and can trigger PME.
PCI system error
PCI parity error
Primary PCI bus clock run. Used by the central resource to stop the PCI
clock or to slow it down
SERR
PERR
CLKRUN
36
35
78
O/D
S/T/S
S/T/S
AC link controller interface
BITCLK
SDATAIN[1:0]
SDATAOUT
75
65. 64
70
I
I
O
Serial data clock; or input for secondary codecs.
Input from AC97/MC97 codecs. V
AUX
powered and can trigger PME.
Output to AC97/MC97 codecs. Driven to 0 at power-up or when RST
asserted.
AC97 sync. Driven to 0 at power-up or when RST asserted.
AC97 reset. Driven to 0 at power-up or when RST asserted. V
AUX
powered.
SYNC
AC97_RST
Serial EEPROM interface
EEPCLK
EEPD
Power management; miscellaneous
V
AUX
_AV
69
TEST
79
Power pins
V
DD
1, 11, 22, 27, 37,
43, 53, 61
V
SS
6, 16, 21, 32, 40,
48, 58, 72, 76
V
AUX
67
71
66
O
O
73
74
O
I/O
EEPROM clock.
EEPROM serial data port.
I
I
Auxiliary power available, V
AUX
powered.
Test mode.
S
3.3 V power pins.
S
Ground pins.
S
Auxiliary power. If auxiliary power is not available or not necessary, this pin
must be connected to V
DD
.
Table 2:
Symbol
Pin description
…continued
Pin
Type
Description
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| UCB1510 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:AC97 digital modem codec |
| UCB15-101T-RC | 制造商:ALLIED 制造商全稱:Allied Components International 功能描述:Ultra Current Beads |
| UCB1510DB | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:AC97 digital modem codec |
| UCB15-121T-RC | 制造商:ALLIED 制造商全稱:Allied Components International 功能描述:Ultra Current Beads |
| UCB15-600T-RC | 制造商:ALLIED 制造商全稱:Allied Components International 功能描述:Ultra Current Beads |
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