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參數資料
| 型號： | UCB1500 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 總線控制器 |
| 英文描述： | PCI to AC97 bridge/host controller |
| 中文描述： | PCI BUS CONTROLLER, PQFP80 |
| 封裝： | 12 X 12 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-315-1, LQFP-80 |
| 文件頁數： | 35/58頁 |
| 文件大小： | 1001K |
| 代理商： | UCB1500 |
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Philips Semiconductors
UCB1500
PCI to AC97 bridge/host controller
Objective specification
Rev. 01 — 4 February 2000
35 of 58
9397 750 06854
Philips Electronics N.V. 2000. All rights reserved.
8.6.4
[00c3]: DMA Channel 0 input/output slot enable / miscellaneous
[1]
Optional feature, use only if GPIO function is not required.
The following 4 registers are similar to the previous, except that they control data on
Channel 1 (which uses DMA controller #2).
8.6.5
[00c4]: AC97 DMA Channel 1 rate
8.6.6
[00c5]: DMA Channel 1 output slot enable
8.6.7
[00c6]: DMA Channel 1 input slot enable / miscellaneous
8.6.8
[00c7]: SMA Channel 1 input/output slot enable / miscellaneous
Table 53: DMA Channel 0 input slot enable / miscellaneous register bit description
Bit
Description
15-14
Input slot 12 enable
[1]
Enables receive channel #0 DMA to store data received on AC97 slot 12.
(Same encoding as regC2.)
13-12
Input slot 9 enable
Enables receive channel #0 DMA to store data received on AC97 slot 9.
(Same encoding as regC2.)
11-10
Input slot 8 enable
Enables receive channel #0 DMA to store data received on AC97 slot 8.
(Same encoding as regC2.)
9-8
Input slot 7 enable
Enables receive channel #0 DMA to store data received on AC97 slot 7.
(Same encoding as regC2.)
7-6
Output slot 12 enable
[1]
Enables transmit channel #0 DMA to output data to AC97 output slot 12.
(Same encoding as regC1.)
5
PCM output left/right surround channel mono
If set, transmit channel #0 DMA will output the same data on the AC97 output
slots 7 and 8. Only data for 1 slot will be stored in memory.
4
PCM output left/right surround channel bind
If set, transmit channel #0 DMA will store data to be transmitted on AC97 output
slot 7 and 8 together in such a way that bits[3-0] of slot 7 and bits [19-16] of slot 8
will be stored as 1 byte.
3
PCM output left/right channel mono
If set, transmit channel #0 DMA will output the same data on the AC97 output
slots 3 and 4. Only data for 1 slot will be stored in memory.
2
PCM output left/right channel bind
If set, transmit channel #0 DMA will store data to be transmitted on aC97 output
slot 3 and 4 together in such a way that bits[3-0] of slot 3 and bits[19-16] of slot 4
will be stored as 1 byte.
1-0
Handset ADC output slot enable
Enables transmit channel #0 DMA to output data to AC97 output slot 11.
(Same encoding as in regC1.)
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