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參數(shù)資料
| 型號： | ADC82124 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | 24 Ports 10/100 Fast Ethernet Switch Controller |
| 中文描述： | 24端口10/100快速以太網(wǎng)開關(guān)控制器 |
| 文件頁數(shù)： | 14/48頁 |
| 文件大小： | 411K |
| 代理商： | ADC82124 |
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14
A
I
D
1001 - Flow Control/Multiple Collision*
1010 - Short Event/Excessive Collision*
1011 - Runt/Late Collision*
1100 - Symbol Error
1101 - FCS Error
1110 - Long Event
1111 - Reserved
*Note: error type depends on whether the port is re-
ceiving or transmitting.
ARLDIx is used to receive the lookup result from the
external ARL. Result is returned by external ARL de-
vice through the ARLDIx lines. Returned data is sampled
by the rising edge of ARLCLK. The ARL result has the
following format:
Where
SID is a 5-bit ID of the source port (0 - 23)
RSLT is a 2-bit result, defined as:
00 - reserved
01 - matched
10 - not matched
11 - forced discard
DID is a 5-bit ID of the destination port (0 - 23)
The start of each ARL result is indicated by assertion
of ARLDIV signal.
LED Interface
The signals in the LED interface is described in table-
6.10
The status of each port is displayed on the LED inter-
face for every 50ms. LEDVLD0 and LEDVLD1 are
used to indicate the start and end of the LED data.
LED data is clocked out by the falling edge of LEDCLK,
and should be sampled by the rising edge of LEDCLK.
LED data of port 23 are clocked out first, followed by
port 22 down to port 0. All LED signals are low active.
SID
RSLT
DID
Table-11: LED Interface Signals
Name
Type
LEDVLD0
O
LEDVLD1
O
nLEDCLK
O
nLED0
O
nLED1
O
nLED2
O
nLED3
O
Description
LED signal valid #0
LED signal valid #1
2.5 MHz LED clock
Dual purpose indicator
Dual purpose indicator
Dual purpose indicator
Dual purpose indicator
Signal Group 1
Signal Group 2
1
0
-
address learning status
full duplex indication
port speed (1=10Mbps,0=100Mbps)
Link status
0
1
-
frame error indicator
collision indication
receiving activity
transmit activity
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