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參數(shù)資料
型號: ADSP-21161NCCA-100
廠商: ANALOG DEVICES INC
元件分類: 數(shù)字信號處理
英文描述: DSP Microcomputer
中文描述: 48-BIT, 27.5 MHz, OTHER DSP, PBGA225
封裝: 17 X 17 MM, MO-192AAF-2, BGA-225
文件頁數(shù): 17/60頁
文件大小: 1019K
代理商: ADSP-21161NCCA-100
–17–
REV. A
ADSP-21161N
BOOT MODES
RSTOUT
1
O
Reset Out
. When
RSTOUT
is asserted (low), this pin indicates that the core blocks are in
reset. It is deasserted 4080 cycles after
RESET
is deasserted indicating that the PLL is stable
and locked.
Test Clock (JTAG)
. Provides a clock for JTAG boundary scan.
Test Mode Select (JTAG)
. Used to control the test state machine. TMS has a 20 k
internal
pull-up resistor.
Test Data Input (JTAG)
. Provides serial data for the boundary scan logic. TDI has a 20 k
internal pull-up resistor.
Test Data Output (JTAG)
. Serial scan output of the boundary scan path.
Test Reset (JTAG)
. Resets the test state machine.
TRST
must be asserted (pulsed low)
after power-up or held low for proper operation of the ADSP-21161N.
TRST
has a 20 k
internal pull-up resistor.
Emulation Status
. Must be connected to the ADSP-21161N Analog Devices DSP Tools
product line of JTAG emulators target board connector only.
EMU
has a 50 k
internal
pull-up resistor.
Core Power Supply
. Nominally +1.8 V dc and supplies the DSP’s core processor (14 pins).
I/O Power Supply
. Nominally +3.3 V dc. (13 pins).
Analog Power Supply
. Nominally +1.8 V dc and supplies the DSP’s internal PLL (clock
generator). This pin has the same specifications as V
DDINT
, except that added filtering
circuitry is required.
See Power Supplies on Page 9.
Analog Power Supply Return
.
Power Supply Return
.
(26 pins).
Do Not Connect
. Reserved pins that must be left open and unconnected. (5 pins
2
).
TCK
TMS
I
I/S
TDI
I/S
TDO
TRST
O
I/A
EMU
O (O/D)
V
DDINT
V
DDEXT
AVDD
P
P
P
AGND
GND
NC
G
G
1
RSTOUT
exists only for silicon revision 1.2.
2
Four NC pins for silicon revision 1.2, because
RSTOUT
has been added.
Table 3. Clock Rate Ratios
CLKDBL
CLK_CFG1
CLK_CFG0
Core:CLKIN
CLKIN:CLKOUT
1
1
1
0
0
0
0
0
1
0
0
1
0
1
0
0
1
0
2:1
3:1
4:1
4:1
6:1
8:1
1:1
1
:1
1
:1
1:2
1:2
1:2
Table 2. Pin Function Descriptions (continued)
Pin
Type
Function
Table 4. Boot Mode Selection
EBOOT
LBOOT
BMS
Booting Mode
1
0
0
0
0
1
0
0
1
1
0
1
Output
1 (Input)
0 (Input)
1 (Input)
0 (Input)
x (Input)
EPROM (Connect
BMS
to EPROM chip select.)
Host Processor
Serial Boot via SPI
Link Port
No Booting. Processor executes from external memory.
Reserved
相關(guān)PDF資料
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ADSP-21161NKCA-100 DSP Microcomputer
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