- 您現在的位置：買賣IC網 > PDF目錄374037 > ADSP-BF561 (Analog Devices, Inc.) Synchronous 4-Bit Up/Down Binary Counters With Dual Clock and Clear 16-PDIP 0 to 70 PDF資料下載
參數資料
| 型號： | ADSP-BF561 |
| 廠商： | Analog Devices, Inc. |
| 元件分類： | 通用總線功能 |
| 英文描述： | Synchronous 4-Bit Up/Down Binary Counters With Dual Clock and Clear 16-PDIP 0 to 70 |
| 中文描述： | 嵌入式Blackfin處理器的對稱多處理器 |
| 文件頁數： | 43/52頁 |
| 文件大小： | 508K |
| 代理商： | ADSP-BF561 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁當前第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁
ADSP-BF561
Preliminary Technical Data
Rev. PrC
|
Page 43 of 52
|
April 2004
Output Enable Time
Output pins are considered to be enabled when they have made
a transition from a high impedance state to the point when they
start driving. The output enable time t
ENA
is the interval from
the point when a reference signal reaches a high or low voltage
level to the point when the output starts driving as shown in the
Output Enable/Disable diagram (
Figure 24
). The time
t
ENA_MEASURED
is the interval from when the reference signal
switches to when the output voltage reaches 2.0V (output high)
or 1.0V (output low). Time t
TRIP
is the interval from when the
output starts driving to when the output reaches the 1.0V or
2.0V trip voltage. Time t
ENA
is calculated as
t
ENA_MEASURED
–t
TRIP
. If multiple pins (such as the data bus) are
enabled, the measurement value is that of the first pin to start
driving.
Output Disable Time
Output pins are considered to be disabled when they stop driv-
ing, go into a high impedance state, and start to decay from their
output high or low voltage. The time for the voltage on the bus
to decay by V is dependent on the capacitive load, C
L
and the
load current, I
L
. This decay time can be approximated by the
following equation:
The output disable time t
DIS
is the difference between
t
DIS_MEASURED
and t
DECAY
as shown in
Figure 24
.The time
t
DIS_MEASURED
is the interval from when the reference signal
switches to when the output voltage decays V from the mea-
sured output high or output low voltage. t
DECAY
is calculated
with test loads C
L
and I
L
, and with V equal to 0.5 V.
EXAMPLE SYSTEM HOLD TIME CALCULATION
To determine the data output hold time in a particular system,
first calculate t
DECAY
using the equation given above. Choose
V to be the difference between the ADSP-BF561's output volt-
age and the input threshold for the device requiring the hold
time. A typical V will be 0.4 V. CL is the total bus capacitance
(per data line), and IL is the total leakage or three-state current
(per data line). The hold time will be t
DECAY
plus the minimum
disable time (i.e., t
DSDAT
for an SDRAM write cycle).
Figure 24. Output Enable/Disable
t
DECAY
C
L
V
(
)
I
L
=
REFERENCE
SIGNAL
t
DIS
OUTPUT STARTS DRIVING
V
OH
(MEASURED) -
V
V
OL
(MEASURED) +
V
t
DIS-MEASURED
V
OH
(MEASURED)
V
OL
(MEASURED)
2.0V
1.0V
V
OH
(MEASURED)
V
OL
(MEASURED)
t
TRIP
HIGH-IMPEDANCE STATE.
TEST CONDITIONS CAUSE THIS
VOLTAGE TO BE APPROXIMATELY 1.5V.
OUTPUT STOPS DRIVING
t
ENA
t
DECAY
t
ENA-MEASURED
Figure 25. Typical Output Delay or Hold vs. Load Capacitance (at Max Case
Temperature)
LOAD CAPACITANCE - pF
5
-5
0
210
30
60
90
120
150
180
4
3
2
1
NOMINAL
O
TBD
相關PDF資料 |
PDF描述 |
|---|---|
| ADSP-BF561SBB500 | Blackfin Embedded Symmetric Multi-Processor |
| ADSP21020 | 32/40-Bit IEEE Floating-Point DSP Microprocessor |
| ADSP-21020BG-100 | 32/40-Bit IEEE Floating-Point DSP Microprocessor |
| ADSP2184 | 16 A SPDT MINIATURE POWER RELAY |
| ADSP2185 | DSP Microcomputer |
相關代理商/技術參數 |
參數描述 |
|---|---|
| adsp-bf5615bbz600 | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Analog Devices 功能描述: |
| ADSP-BF561KBCZ-600 | 制造商:Analog Devices 功能描述: |
| ADSP-BF561SBB500 | 功能描述:IC PROCESSOR 500MHZ 297PBGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - DSP（數字式信號處理器） 系列:Blackfin® 標準包裝:2 系列:StarCore 類型:SC140 內核 接口:DSI，以太網，RS-232 時鐘速率:400MHz 非易失內存:外部 芯片上RAM:1.436MB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:-40°C ~ 105°C 安裝類型:表面貼裝 封裝/外殼:431-BFBGA，FCBGA 供應商設備封裝:431-FCPBGA（20x20） 包裝:托盤 |
| ADSP-BF561SBB600 | 功能描述:IC DSP 32BIT 600MHZ 297-BGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - DSP（數字式信號處理器） 系列:Blackfin® 標準包裝:2 系列:StarCore 類型:SC140 內核 接口:DSI，以太網，RS-232 時鐘速率:400MHz 非易失內存:外部 芯片上RAM:1.436MB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:-40°C ~ 105°C 安裝類型:表面貼裝 封裝/外殼:431-BFBGA，FCBGA 供應商設備封裝:431-FCPBGA（20x20） 包裝:托盤 |
| ADSP-BF561SBB600 | 制造商:Analog Devices 功能描述:IC MULTIPROCESSOR |
發布緊急采購，3分鐘左右您將得到回復。