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參數資料
型號: ISP1362EE
廠商: NXP SEMICONDUCTORS
元件分類: 總線控制器
英文描述: Single-chip Universal Serial Bus On-The-Go controller
中文描述: UNIVERSAL SERIAL BUS CONTROLLER, PBGA64
封裝: 6 X 6 MM, 0.80 HEIGHT, PLASTIC, MO-195, SOT-543-1, TFBGA-64
文件頁數: 38/150頁
文件大小: 647K
代理商: ISP1362EE
Philips Semiconductors
ISP1362
Single-chip USB OTG controller
Product data
Rev. 03
06 January 2004
38 of 150
9397 750 12337
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
2. Set the corresponding bits of the OtgInterruptEnable register (bits 0 to 8, or some
of them).
3. Set bit OTG_IRQ_InterruptEnable of the Hc
μ
PInterruptEnable register (bit 9).
4. Set bit InterruptPinEnable of the HcHardwareCon
fi
guration register (bit 0).
When an interrupt is generated on INT1, perform these steps in the interrupt service
routine to get the related OTG status:
1. Read the Hc
μ
PInterrupt register. If OTG_IRQ (bit 9) is set, then step 2.
2. Read the OtgInterrupt register. If any of the bits 0 to 4 are set, then step 3.
3. Read the OtgStatus register.
The OTG state machine routines are called when any of the inputs is changed. These
inputs come from either OTG registers (hardware) or application program (software).
The outputs of the state machine include control signals to the OTG register (for
hardware) and states or error codes (for software). For more information, refer to the
Philips document
ISP136x Embedded Programming Guide
.
11.5 Power saving in the idle state and during wake-up
The ISP1362 can be put in the power saving mode if the OTG device is not in a
session. This signi
fi
cantly reduces the power consumption. In this mode, both the DC
and the HC are suspended. The PLL and the oscillator are stopped, and the charge
pump is in the suspend state.
As an OTG device, however, the ISP1362 is required to respond to the SRP event. To
support this, a LazyClock is kept running when the chip is in the power saving mode.
An SRP event will wake up the chip (that is, enable the PLL and the oscillator).
Besides this, an ID change or B_SESS_VLD detection can also wake up the chip.
These wake-up events can be enabled or disabled by programming the related bits of
the OtgInterruptEnable register before putting the chip in the power saving mode. If
the bit is set, then the corresponding event (status change) will wake up the ISP1362.
If the bit is cleared, then the corresponding event will not wake up the ISP1362.
You can also wake up the ISP1362 from the power saving mode by using software.
This is accomplished by accessing any of ISP1362 registers. Accessing a register will
assert CS of the ISP1362, and therefore, set it awake.
11.6 Current capacity of the OTG charge pump
The ISP1362 uses a built-in charge pump to generate a 5 V V
BUS
supply from a
3.3 V
±
0.3 V voltage source. The only external component required is a capacitor.
The value of this capacitor depends on the amount of current drive required.
Table 7
provides two recommended capacitor values and the corresponding current drive.
Table 7:
Capacitance
27 nF
82 nF
Recommended capacitor values
V
CC
3.0 V to 3.6 V
3.0 V to 3.3 V
3.3 V to 3.6 V
Current
8 mA
14 mA
20 mA
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相關代理商/技術參數
參數描述
ISP1362EE,518 功能描述:USB 接口集成電路 USB OTG HOST RoHS:否 制造商:Cypress Semiconductor 產品:USB 2.0 數據速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1362EE,551 功能描述:USB 接口集成電路 DO NOT USE ORDER -T PART RoHS:否 制造商:Cypress Semiconductor 產品:USB 2.0 數據速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1362EE,557 功能描述:USB 接口集成電路 DO NOT USE ORDER -T PART RoHS:否 制造商:Cypress Semiconductor 產品:USB 2.0 數據速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1362EE/01 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Single-chip Universal Serial Bus On-The-Go controller
ISP1362EE-S 功能描述:IC USB CTRL SNGL CHIP 64TFBGA RoHS:是 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標準包裝:4,900 系列:- 控制器類型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤 供應商設備封裝:36-QFN(6x6) 包裝:* 其它名稱:Q6396337A
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