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參數(shù)資料
型號(hào): ISP1362EE
廠商: NXP SEMICONDUCTORS
元件分類: 總線控制器
英文描述: Single-chip Universal Serial Bus On-The-Go controller
中文描述: UNIVERSAL SERIAL BUS CONTROLLER, PBGA64
封裝: 6 X 6 MM, 0.80 HEIGHT, PLASTIC, MO-195, SOT-543-1, TFBGA-64
文件頁數(shù): 80/150頁
文件大小: 647K
代理商: ISP1362EE
Philips Semiconductors
ISP1362
Single-chip USB OTG controller
Product data
Rev. 03
06 January 2004
80 of 150
9397 750 12337
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
15.2.3
HcFmNumber register (R/W: 0FH/8FH)
The HcFmNumber register is a 16-bit counter, and the bit allocation is given in
Table 51
. It provides a timing reference for events happening in the HC and the HCD.
The HCD may use the 16-bit value speci
fi
ed in this register and generate a 32-bit
frame number without requiring frequent access to the register.
Code (Hex): 0F
read
Code (Hex): 8F
write
Table 50:
Bit
31
HcFmRemaining register: bit description
Symbol
Description
FRT
FrameRemainingToggle:
This bit is loaded from the
FrameIntervalToggle (FIT)
fi
eld of HcFmInterval whenever
FrameRemaining (FR) reaches 0. This bit is used by the HCD for
synchronization between FrameInterval (FI) and FrameRemaining
(FR).
-
reserved
FR[13:0]
FrameRemaining:
This counter is decremented at each bit time.
When it reaches zero, it is reset by loading the FrameInterval (FI)
value speci
fi
ed in HcFmInterval at the next bit time boundary.
When entering the USBOperational state, the HC reloads it with
the content of the FrameInterval (FI) part of the HcFmInterval
register and uses the updated value from the next SOF.
30 to 14
13 to 0
Table 51:
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
HCFmNumber register: bit allocation
31
30
29
28
27
26
25
24
reserved
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
23
22
21
20
19
18
17
16
reserved
-
-
-
-
-
-
-
-
-
-
-
-
-
-
9
-
-
8
15
14
13
12
11
10
FN[15:8]
0
R
7
0
R
6
0
R
5
0
R
4
0
R
3
0
R
2
0
R
1
0
R
0
FN[7:0]
0
R
0
R
0
R
0
R
0
R
0
R
0
R
0
R
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