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參數(shù)資料

型號：	QADCRM
英文描述：	Queued Analog-to-Digital Converter Reference Manual
中文描述：	排隊模擬到數(shù)字轉(zhuǎn)換器參考手冊
文件頁數(shù)：	46/122頁
文件大?。?/td>	940K
代理商：	QADCRM

MOTOROLA

6-4

ANALOG SUBSYSTEM

QADC

REFERENCE MANUAL

6.4 Comparator

The comparator is used during the approximation process to sense whether the digi-

tally selected arrangement of the DAC array produces a voltage level higher or lower

than the sampled input. The comparator output feeds into the SAR which accumulates

the A/D conversion result sequentially, starting with the MSB.

6.5 Successive Approximation Register

The input of the successive approximation register (SAR) is connected to the compar-

ator output. The SAR sequentially receives the conversion value one bit at a time,

starting with the MSB. After accumulating the 10 bits of the conversion result, the SAR

data is transferred to the appropriate result location, where it may be read from the IMB

by user software.

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

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