
QADC
REFERENCE MANUAL
QUEUE PRIORITY EXAMPLES
MOTOROLA
9-1
SECTION 9 QUEUE PRIORITY EXAMPLES
The following section describes the QADC priority scheme when trigger events on two
queues overlap or conflict.
9.1 Queue Priority Schemes
Since there are two conversion command queues and only one A/D converter, there
is a priority scheme to determine which conversion is to occur. Each queue has a va-
riety of trigger events that are intended to initiate conversions, and they can occur
asynchronously in relation to each other and other conversions in progress. For exam-
ple, a queue can be idle awaiting a trigger event, a trigger event can have occurred,
but the first conversion has not started, a conversion can be in progress, a pause con-
dition can exist awaiting another trigger event to continue the queue, and so on.
The following paragraphs and figures outline the prioritizing criteria used to determine
which conversion occurs in each overlap situation.
NOTE
Each situation in
Figure 9-1
through
Figure 9-19
are labeled S1
through S19. In each diagram, time is shown increasing from left to
right. The execution of queue 1 and queue 2 (Q1 and Q2) is shown
as a string of rectangles representing the execution time of each
CCW in the queue. In most of the situations, there are four CCWs (la-
beled C1 to C4) in both queue 1 and queue 2. In some of the situa-
tions, CCW C2 is presumed to have the pause bit set, to show the
similarities of pause and end-of-queue as terminations of queue ex-
ecution.
Trigger events are described in
Table 9-1
.
When a trigger event causes a CCW execution in progress to be aborted, the aborted
conversion is shown as a ragged end of a shortened CCW rectangle.
The situation diagrams also show when key status bits are set.
Table 9-2
describes
the status bits.
Table 9-1 Trigger Events
Trigger
T1
Events
Events that trigger queue 1 execution (external trigger,
software initiated single-scan enable bit, or completion of
the previous continuous loop)
Events that trigger queue 2 execution (external trigger,
software initiated single-scan enable bit, timer period/inter-
val expired, or completion of the previous continuous loop)
T2
F
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n
.