欧美成人免费电影,国产欧美一区二区三区精品酒店,精品国产a毛片,色网在线免费观看

參數資料
型號: TLV320DAC3120IRHBR
廠商: TEXAS INSTRUMENTS INC
元件分類: DAC
英文描述: SERIAL INPUT LOADING, 24-BIT DAC, PQCC32
封裝: 5 X 5 MM, PLASTIC, QFN-32
文件頁數: 51/110頁
文件大小: 1230K
代理商: TLV320DAC3120IRHBR
BCLK
WCLK
1
0
1
0
T0149-05
1/f
S
LSB
MSB
Left Channel
Right Channel
2
DIN
n–1
n–2
n–3
www.ti.com
SLAS659 – NOVEMBER 2009
The TLV320DAC3120 also includes a feature to offset the position of start of data transfer with respect to
the word clock. This offset can be controlled in terms of number of bit clocks and can be programmed in
page 0 / register 28.
The TLV320DAC3120 also has the feature of inverting the polarity of the bit clock used for transferring the
audio data as compared to the default clock polarity used. This feature can be used independently of the
mode of audio interface chosen. This can be configured via page 0 / register 29, bit D3.
By default, when the word clocks and bit clocks are generated by the TLV320DAC3120, these clocks are
active only when the DAC is powered up within the device. This is done to save power. However, it also
supports a feature when both the word clocks and bit clocks can be active even when the codec in the
device is powered down. This is useful when using the TDM mode with multiple codecs on the same bus,
or when word clocks or bit clocks are used in the system as general-purpose clocks.
5.8.1.1
Right-Justified Mode
The audio interface of the TLV320DAC3120 can be put into right-justified mode by programming page 0 /
register 27, bits D7–D6 = 10. In right-justified mode, the LSB of the left channel is valid on the rising edge
of the bit clock preceding the falling edge of the word clock. Similarly, the LSB of the right channel is valid
on the rising edge of the bit clock preceding the rising edge of the word clock.
Figure 5-19. Timing Diagram for Right-Justified Mode
For right-justified mode, the number of bit clocks per frame should be greater than or equal to twice the
programmed word length of the data.
Copyright 2009, Texas Instruments Incorporated
APPLICATION INFORMATION
45
Product Folder Link(s): TLV320DAC3120
相關PDF資料
PDF描述
TLV320DAC3120IRHBT SERIAL INPUT LOADING, 24-BIT DAC, PQCC32
TLV320DAC3202IYZJR VOLUME CONTROL CIRCUIT, PBGA20
TLV320DAC3202IYZJT VOLUME CONTROL CIRCUIT, PBGA20
TLV320DAC32IRHBR SERIAL INPUT LOADING, DAC WITH PROGRAMMABLE PLL, PQCC32
TLV320DAC32IRHBTG4 SERIAL INPUT LOADING, DAC WITH PROGRAMMABLE PLL, PQCC32
相關代理商/技術參數
參數描述
TLV320DAC3120IRHBT 功能描述:音頻數/模轉換器 IC Lo-Pwr Audio DAC w/ Audio Proc RoHS:否 制造商:Texas Instruments 轉換器數量: 分辨率:16 bit 接口類型:I2S, UBS 轉換速率: 信噪比:98 dB 工作電源電壓:5 V DAC 輸出端數量:2 工作溫度范圍:- 25 C to + 85 C 電源電流:23 mA 安裝風格:SMD/SMT 封裝 / 箱體:TQFP-32 封裝:Reel
TLV320DAC3120IRHBT 制造商:Texas Instruments 功能描述:D/A Converter (D-A) IC 制造商:Texas Instruments 功能描述:IC, DAC, 32BIT, 192KSPS, QFN-32
TLV320DAC32 制造商:BB 制造商全稱:BB 功能描述:LOW POWER STEREO AUDIO DAC FOR PORTABLE AUDIO/TELEPHONY
TLV320DAC3202 制造商:TI 制造商全稱:Texas Instruments 功能描述:LOW POWER HIGH FIDELITY I2S INPUT HEADSET IC
TLV320DAC3202BYZJR 功能描述:音頻數/模轉換器 IC Lo Pwr Hi Fidelity I2S Input Headset IC RoHS:否 制造商:Texas Instruments 轉換器數量: 分辨率:16 bit 接口類型:I2S, UBS 轉換速率: 信噪比:98 dB 工作電源電壓:5 V DAC 輸出端數量:2 工作溫度范圍:- 25 C to + 85 C 電源電流:23 mA 安裝風格:SMD/SMT 封裝 / 箱體:TQFP-32 封裝:Reel
主站蜘蛛池模板: 武强县| 什邡市| 商水县| 修水县| 启东市| 商城县| 鄂托克前旗| 大洼县| 朝阳县| 德令哈市| 英吉沙县| 织金县| 云阳县| 南丰县| 平顺县| 永城市| 叶城县| 肥西县| 谷城县| 怀柔区| 汕头市| 望奎县| 沂源县| 泾阳县| 买车| 朔州市| 磴口县| 商丘市| 金湖县| 松原市| 额济纳旗| 集贤县| 托克托县| 马边| 余干县| 房产| 延川县| 响水县| 上高县| 绥江县| 禹州市|