- 您現在的位置：買賣IC網 > PDF目錄98255 > TLV320DAC3120IRHBR (TEXAS INSTRUMENTS INC) SERIAL INPUT LOADING, 24-BIT DAC, PQCC32 PDF資料下載
參數資料
| 型號： | TLV320DAC3120IRHBR |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | DAC |
| 英文描述： | SERIAL INPUT LOADING, 24-BIT DAC, PQCC32 |
| 封裝： | 5 X 5 MM, PLASTIC, QFN-32 |
| 文件頁數： | 72/110頁 |
| 文件大小： | 1230K |
| 代理商： | TLV320DAC3120IRHBR |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁當前第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁
SLAS659 – NOVEMBER 2009
www.ti.com
Page 0 / Register 64: DAC VOLUME CONTROL
READ/
RESET
BIT
DESCRIPTION
WRITE
VALUE
D7–D4
R/W
0000
Reserved. Write only zeros to these bits.
D3
R/W
1
0: DAC not muted
1: DAC muted
D2
R/W
1
Reserved.
D1–D0
R/W
00
Reserved. Always write reset value.
Page 0 / Register 65: DAC Volume Control
READ/
RESET
BIT
DESCRIPTION
WRITE
VALUE
D7–D0
R/W
0000 0000
127 to 49: Reserved. Do not write these sequences to these bits.
48: DAC Digital gain = 24 dB
47: DAC Digital gain = 23.5 dB
46: DAC Digital gain = 23 dB
...
36: DAC Digital gain = 18 dB
35: DAC Digital gain = 17.5 dB
34: DAC Digital gain = 17 dB
...
1: DAC Digital gain = 0.5 dB
0: DAC Digital gain = 0 dB
–1: DAC Digital gain = –0.5 dB
...
–126: DAC Digital gain = –63 dB
–127: DAC Digital gain = –63.5 dB
–128: Reserved
Page 0 / Register 66: Reserved
READ/
RESET
BIT
DESCRIPTION
WRITE
VALUE
D7–D0
R/W
0000 0000
Reserved. write only reset values.
Page 0 / Register 67: Headset Detection
READ/
RESET
BIT
DESCRIPTION
WRITE
VALUE
D7
R/W
0
0: Headset detection disabled
1: Headset detection enabled
D6–D5
R
XX
00: No headset detected
01: Headset without microphone is detected
10: Reserved
11: Headset with microphone is detected
D4–D2
R/W
000
Debounce Programming for Glitch Rejection During Headset Detection(1)
000: 16 ms (sampled with 2-ms clock)
001: 32 ms (sampled with 4-ms clock)
010: 64 ms (sampled with 8-ms clock)
011: 128 ms (sampled with 16-ms clock)
100: 256 ms (sampled with 32-ms clock)
101: 512 ms (sampled with 64-ms clock)
110: Reserved
111: Reserved
D1–D0
R/W
00
Debounce Programming for Glitch Rejection During Headset Button-Press Detection
00: 0 ms
01: 8 ms (sampled with 1-ms clock)
10: 16 ms (sampled with 2-ms clock)
11: 32 ms (sampled with 4-ms clock)
(1)
Note that these times are generated using the 1 MHz reference clock which is defined in page 3 / register 16.
64
REGISTER MAP
Copyright 2009, Texas Instruments Incorporated
Product Folder Link(s): TLV320DAC3120
相關PDF資料 |
PDF描述 |
|---|---|
| TLV320DAC3120IRHBT | SERIAL INPUT LOADING, 24-BIT DAC, PQCC32 |
| TLV320DAC3202IYZJR | VOLUME CONTROL CIRCUIT, PBGA20 |
| TLV320DAC3202IYZJT | VOLUME CONTROL CIRCUIT, PBGA20 |
| TLV320DAC32IRHBR | SERIAL INPUT LOADING, DAC WITH PROGRAMMABLE PLL, PQCC32 |
| TLV320DAC32IRHBTG4 | SERIAL INPUT LOADING, DAC WITH PROGRAMMABLE PLL, PQCC32 |
相關代理商/技術參數 |
參數描述 |
|---|---|
| TLV320DAC3120IRHBT | 功能描述:音頻數/模轉換器 IC Lo-Pwr Audio DAC w/ Audio Proc RoHS:否 制造商:Texas Instruments 轉換器數量: 分辨率:16 bit 接口類型:I2S, UBS 轉換速率: 信噪比:98 dB 工作電源電壓:5 V DAC 輸出端數量:2 工作溫度范圍:- 25 C to + 85 C 電源電流:23 mA 安裝風格:SMD/SMT 封裝 / 箱體:TQFP-32 封裝:Reel |
| TLV320DAC3120IRHBT | 制造商:Texas Instruments 功能描述:D/A Converter (D-A) IC 制造商:Texas Instruments 功能描述:IC, DAC, 32BIT, 192KSPS, QFN-32 |
| TLV320DAC32 | 制造商:BB 制造商全稱:BB 功能描述:LOW POWER STEREO AUDIO DAC FOR PORTABLE AUDIO/TELEPHONY |
| TLV320DAC3202 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:LOW POWER HIGH FIDELITY I2S INPUT HEADSET IC |
| TLV320DAC3202BYZJR | 功能描述:音頻數/模轉換器 IC Lo Pwr Hi Fidelity I2S Input Headset IC RoHS:否 制造商:Texas Instruments 轉換器數量: 分辨率:16 bit 接口類型:I2S, UBS 轉換速率: 信噪比:98 dB 工作電源電壓:5 V DAC 輸出端數量:2 工作溫度范圍:- 25 C to + 85 C 電源電流:23 mA 安裝風格:SMD/SMT 封裝 / 箱體:TQFP-32 封裝:Reel |
發布緊急采購，3分鐘左右您將得到回復。