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參數資料
| 型號： | ISP1161BD |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 總線控制器 |
| 英文描述： | Full-speed Universal Serial Bus single-chip host and device controller |
| 中文描述： | UNIVERSAL SERIAL BUS CONTROLLER, PQFP64 |
| 封裝： | 10 X 10 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-314-2, LQFP-64 |
| 文件頁數： | 53/127頁 |
| 文件大小： | 2762K |
| 代理商： | ISP1161BD |
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Philips Semiconductors
ISP1161
Full-speed USB single-chip host and device controller
Product data
Rev. 01 — 3 July 2001
53 of 130
9397 750 08313
Philips Electronics N.V. 2001. All rights reserved.
13. HC registers
The HC contains a set of on-chip control registers. These registers can be read or
written by the Host Controller Driver (HCD). The Control and Status register sets,
Frame Counter register sets, and Root Hub register sets are grouped under the
category of HC Operational Registers (32 bits). These operational registers are made
compatible to OpenHCI (Host Controller Interface) Operational Registers. This makes
a provision that the OpenHCI HCD can be ported to ISP1161 easily.
Reserved bits may be defined in future releases of this specification. To ensure
interoperability, the HCD that does not use a reserved field must not assume that the
reserved field contains logic 0. Furthermore, the HCD must always preserve the
values of the reserved field. When a R/W register is modified, the HCD must first read
the register, modify the bits desired, and then write the register with the reserved bits
still containing the read value. Alternatively, the HCD can maintain an in-memory
copy of previously written values that can be modified and then written to the HC
register. When a write to set or clear the register is written, bits written to reserved
fields must be logic 0.
As shown in
Table 15
, the offset locations (the commands for reading registers) of
these Operational Registers (the 32-bit registers) are similar to those defined in the
OHCI specification, however, the addresses are equal to offset DIV 4:
Table 15: HC Control Register summary
Command (Hex)
Register
Read
Write
00
N/A
HcRevision
01
81
HcControl
02
82
HcCommandStatus
03
83
HcInterruptStatus
04
84
HcInterruptEnable
05
85
HcInterruptDisable
0D
8D
HcFmInterval
0E
N/A
HcFmRemaining
0F
N/A
HcFmNumber
11
91
HcLSThreshold
12
92
HcRhDescriptorA
13
93
HcRhDescriptorB
14
94
HcRhStatus
15
95
HcRhPortStatus[1]
16
96
HcRhPortStatus[2]
20
A0
HcHardwareConfiguration
21
A1
HcDMAConfiguration
22
A2
HcTransferCounter
24
A4
Hc
μ
PInterrupt
25
A5
Hc
μ
PInterruptEnable
Width Functionality
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
16
16
16
16
16
HC Control and Status Registers
HC Frame Counter Registers
HC Root Hub Registers
HC DMA and Interrupt Control
Registers
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PDF描述 |
|---|---|
| ISP1161BM | Full-speed Universal Serial Bus single-chip host and device controller |
| ISP1181ABS | INDUCTOR 1.0NH +-.3NH FIXED SMD |
| ISP1181A | Full-speed Universal Serial Bus peripheral controller |
| ISP1181ADGG | Full-speed Universal Serial Bus peripheral controller |
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相關代理商/技術參數 |
參數描述 |
|---|---|
| ISP1161BM | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Full-speed Universal Serial Bus single-chip host and device controller |
| ISP1181 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Full-speed Universal Serial Bus interface device |
| ISP1181A | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Full-speed Universal Serial Bus peripheral controller |
| ISP1181ABS | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Full-speed Universal Serial Bus peripheral controller |
| ISP1181ABS,518 | 功能描述:USB 接口集成電路 USB 1.1 ADV DEVICE RoHS:否 制造商:Cypress Semiconductor 產品:USB 2.0 數據速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
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