
Philips Semiconductors
ISP1161
Full-speed USB single-chip host and device controller
Product data
Rev. 01 — 3 July 2001
74 of 130
9397 750 08313
Philips Electronics N.V. 2001. All rights reserved.
8
PPS
(read)
PortPowerStatus:
This bit reflects the port power status,
regardless of the type of power switching implemented. This bit is
cleared if an overcurrent condition is detected.
The HCD sets this bit by writing SetPortPower or SetGlobalPower.
The HCD clears this bit by writing ClearPortPower or
ClearGlobalPower. Which power control switches are enabled is
determined by PowerSwitchingMode.
In the global switching mode (PowerSwitchingMode = 0), only
Set/ClearGlobalPower controls this bit. In per-port power switching
(PowerSwitchingMode = 1), if the PortPowerControlMask[NDP] bit
for the port is set, only Set/ClearPortPower commands are
enabled. If the mask is not set, only Set/ClearGlobalPower
commands are enabled.
When port power is disabled, CurrentConnectStatus,
PortEnableStatus, PortSuspendStatus, and PortResetStatus
should be reset.
0 —
port power is off
1 —
port power is on
(write)
SetPortPower:
The HCD writes a logic 1 to set the
PortPowerStatus bit. Writing a logic 0 has no effect.
Remark:
This bit always reads logic 1 if power switching is not
supported.
reserved
(read)
PortResetStatus:
When this bit is set by a write to
SetPortReset, port reset signaling is asserted. When reset is
completed, this bit is cleared when PortResetStatusChange is set.
This bit cannot be set if CurrentConnectStatus is cleared.
0 —
port reset signal is not active
1 —
port reset signal is active
(write)
SetPortReset:
The HCD sets the port reset signaling by
writing a 1 to this bit. Writing a 0 has no effect. If
CurrentConnectStatus is cleared, this write does not set
PortResetStatus but instead sets ConnectStatusChange. This
informs the driver that it attempted to reset a disconnected port.
(read)
PortOverCurrentIndicator:
This bit is valid only when the
Root Hub is configured in such a way that overcurrent conditions
are reported on a per-port basis. If per-port overcurrent reporting
is not supported, this bit is set to logic 0. If cleared, all power
operations are normal for this port. If set, an overcurrent condition
exists on this port. This bit always reflects the overcurrent input
signal
0 —
no overcurrent condition
1 —
overcurrent condition detected
(write)
ClearSuspendStatus:
The HCD writes a logic 1 to initiate
a resume. Writing a logic 0 has no effect. A resume is initiated only
if PortSuspendStatus is set.
7 to 5
4
-
PRS
3
POCI
Table 43: HcRhPortStatus[1:2] Register: bit description
…continued
Bit
Symbol
Description