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參數資料
| 型號： | ISP1161BD |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 總線控制器 |
| 英文描述： | Full-speed Universal Serial Bus single-chip host and device controller |
| 中文描述： | UNIVERSAL SERIAL BUS CONTROLLER, PQFP64 |
| 封裝： | 10 X 10 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-314-2, LQFP-64 |
| 文件頁數： | 87/127頁 |
| 文件大小： | 2762K |
| 代理商： | ISP1161BD |
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Philips Semiconductors
ISP1161
Full-speed USB single-chip host and device controller
Product data
Rev. 01 — 3 July 2001
87 of 130
9397 750 08313
Philips Electronics N.V. 2001. All rights reserved.
1.
Command phase
: when address bit A0 = 1, the DC interprets the data on the
lower byte of the bus (bits D7 to D0) as a command code. Commands without a
data phase are executed immediately.
2.
Data phase (optional)
: when address bit A0 = 0, the DC transfers the data on
the bus to or from a register or endpoint FIFO. Multi-byte registers are accessed
least significant byte/word first.
As the ISP1161 DC’s data bus is 16 bits wide:
The upper byte (bits D15 to D8) in command phase or the undefined byte in data
phase is ignored.
The access of registers is word-aligned: byte access is not allowed.
If the packet length is odd, the upper byte of the last word in an IN endpoint buffer
is
not
transmitted to the host. When reading from an OUT endpoint buffer, the
upper byte of the last word must be ignored by the firmware. The packet length is
stored in the first 2 bytes of the endpoint buffer.
Table 74: Command and register summary
Name
Initialization commands
Write Control OUT Configuration
Destination
Code (Hex)
Transaction
[1]
Endpoint Configuration Register
endpoint 0 OUT
Endpoint Configuration Register
endpoint 0 IN
Endpoint Configuration Register
endpoint 1 to 14
Endpoint Configuration Register
endpoint 0 OUT
Endpoint Configuration Register
endpoint 0 IN
Endpoint Configuration Register
endpoint 1 to 14
Address Register
Mode Register
20
write 1 word
Write Control IN Configuration
21
write 1 word
Write Endpoint n Configuration
(n = 1 to 14)
Read Control OUT Configuration
22 to 2F
write 1 word
30
read 1 word
Read Control IN Configuration
31
read 1 word
Read Endpoint n Configuration
(n = 1 to 14)
Write/Read Device Address
Write/Read Mode Register
Write/Read Hardware Configuration Hardware Configuration Register
Write/Read Interrupt Enable
Register
Write/Read DMA Configuration
Write/Read DMA Counter
Reset Device
Data flow commands
Write Control OUT Buffer
Write Control IN Buffer
Write Endpoint n Buffer
(n = 1 to 14)
32 to 3F
read 1 word
B6/B7
B8/B9
BA/BB
C2/C3
write/read 1 word
write/read 1 word
write/read 1 word
write/read 2 words
Interrupt Enable Register
DMA Configuration Register
DMA Counter Register
resets all registers
F0/F1
F2/F3
F6
write/read 1 word
write/read 1 word
-
illegal: endpoint is read-only
FIFO endpoint 0 IN
FIFO endpoint 1 to 14
(IN endpoints only)
(00)
01
02 to 0F
-
N
≤
64 bytes
isochronous: N
≤
1023 bytes
interrupt/bulk: N
≤
64 bytes
N
≤
64 bytes
-
Read Control OUT Buffer
Read Control IN Buffer
FIFO endpoint 0 OUT
illegal: endpoint is write-only
10
(11)
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相關代理商/技術參數 |
參數描述 |
|---|---|
| ISP1161BM | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Full-speed Universal Serial Bus single-chip host and device controller |
| ISP1181 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Full-speed Universal Serial Bus interface device |
| ISP1181A | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Full-speed Universal Serial Bus peripheral controller |
| ISP1181ABS | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Full-speed Universal Serial Bus peripheral controller |
| ISP1181ABS,518 | 功能描述:USB 接口集成電路 USB 1.1 ADV DEVICE RoHS:否 制造商:Cypress Semiconductor 產品:USB 2.0 數據速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
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