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參數資料
| 型號： | ISP1161BD |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 總線控制器 |
| 英文描述： | Full-speed Universal Serial Bus single-chip host and device controller |
| 中文描述： | UNIVERSAL SERIAL BUS CONTROLLER, PQFP64 |
| 封裝： | 10 X 10 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-314-2, LQFP-64 |
| 文件頁數： | 80/127頁 |
| 文件大小： | 2762K |
| 代理商： | ISP1161BD |
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Philips Semiconductors
ISP1161
Full-speed USB single-chip host and device controller
Product data
Rev. 01 — 3 July 2001
80 of 130
9397 750 08313
Philips Electronics N.V. 2001. All rights reserved.
13.4.5
HcuPInterruptEnable Register
The bits 6:0 in this register are the same as those in the Hc
μ
PInterrupt register. They
are used together with bit 0 of the HcHardwareConfiguration register to enable or
disable the bits in the Hc
μ
PInterrupt register.
On power-on, all bits in this register are masked with 0. This means no interrupt
request output on the interrupt pin INT1 can be generated.
When the bit is set to 1, the interrupt for the bit is not masked but enabled.
Table 52: Hc
μ
PInterruptEnable Register: bit allocation
Bit
15
Symbol
Reset
Access
Bit
7
Symbol
reserved
14
13
12
11
10
9
8
reserved
00H
R/W
6
5
4
3
2
1
0
ClkReady
HC
Suspended
Enable
0
OPR
Interrupt
Enable
0
reserved
EOT
Interrupt
Enable
0
ATL
Interrupt
Enable
0
SOF
Interrupt
Enable
0
Reset
Access
0
0
0
R/W
Table 53: Hc
μ
PInterruptEnable Register: bit description
Bit
Symbol
Description
15 to 8
-
reserved
7
-
reserved
6
ClkReady
0 —
power-up value
1 —
enables Clkready interrupt
5
HC
Suspended
Enable
wants to suspend the HC, the microprocessor must write to the
HcControl register. And when all downstream devices are
suspended, then the HC stops sending SOF; the HC is suspended
by having the HcControl register written into.
4
OPR
Interrupt
Enable
requires the Operational register to be updated)
3
-
reserved
2
EOT
Interrupt
Enable
Read/Write transfer
1
ATL
Interrupt
Enable
the number of clock bits set for USB activities in each ms.
0
SOF
Interrupt
Enable
DMA to get ISO data from the HC by first accessing the
HcDMAConfiguration register)
0 —
power-up value
1 —
enables HC suspended interrupt. When the microprocessor
0 —
power-up value
1 —
enables the 32-bit Operational register’s interrupt (if the HC
0 —
power-up value
1 —
enables the EOT interrupt which indicates an end of a
0 —
power-up value
1 —
enables ATL interrupt. The time for this interrupt depends on
0 —
power-up value
1 —
enables the interrupt bit due to SOF (for the microprocessor
相關PDF資料 |
PDF描述 |
|---|---|
| ISP1161BM | Full-speed Universal Serial Bus single-chip host and device controller |
| ISP1181ABS | INDUCTOR 1.0NH +-.3NH FIXED SMD |
| ISP1181A | Full-speed Universal Serial Bus peripheral controller |
| ISP1181ADGG | Full-speed Universal Serial Bus peripheral controller |
| ISP1181B | Full-speed Universal Serial Bus peripheral controller |
相關代理商/技術參數 |
參數描述 |
|---|---|
| ISP1161BM | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Full-speed Universal Serial Bus single-chip host and device controller |
| ISP1181 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Full-speed Universal Serial Bus interface device |
| ISP1181A | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Full-speed Universal Serial Bus peripheral controller |
| ISP1181ABS | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Full-speed Universal Serial Bus peripheral controller |
| ISP1181ABS,518 | 功能描述:USB 接口集成電路 USB 1.1 ADV DEVICE RoHS:否 制造商:Cypress Semiconductor 產品:USB 2.0 數據速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
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