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參數(shù)資料
| 型號(hào)： | P90CL301 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Low voltage 16-bit microcontroller |
| 中文描述： | 低電壓16位微控制器 |
| 文件頁數(shù)： | 19/92頁 |
| 文件大小： | 526K |
| 代理商： | P90CL301 |
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1996 Dec 11
19
Philips Semiconductors
Preliminary specification
Low voltage 16-bit microcontroller
P90CL301BFH (C100)
7
CPU FUNCTIONAL DESCRIPTION
7.1
General
The CPU of the P90CL301BFH is software compatible
with the Motorola MC68000, hence programs written for
the MC68000 will run on the P90CL301BFH without
modifications. However, for certain applications the
following differences between processors should be
noted:
Differences exist in the address/bus error exception
processing since the P90CL301BFH can provide full
error recovery.
The timing is different for the P90CL301BFH due to a
new internal architecture and technology.
The instruction execution timing is different for the same
reasons.
7.2
Programming model and data organization
The programming model is identical to that of the
MC68000 (see Fig.5), with seventeen 32-bit registers, a
32-bit Program Counter and a 16-bit Status Register.
The eight data registers (D0 to D7) are used for byte, word
and long-word operations. The Address Registers
(A0 to A6) and the System Stack Pointer A7 can be used
as software stack pointers and base address registers. In
addition, these registers can be used for word and
long-word address operations. All seventeen registers can
be used as index registers.
The P90CL301BFH supports 8, 16 and 32-bit integers as
well as BCD data and 32-bit addresses. Each data type is
arranged in the memory as shown in Fig.6.
Table 20
Format of the Status Register and description of the bits; r = reserved
15
14
r
13
12
11
10
9
8
7
6
r
5
4
3
2
1
0
T
S
12
Interrupt mask
11
10
X
N
Z
V
C
Trace mode
Supervisor
r
Extend Negative
Zero
Overflow Carry
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