
TMXF28155 Supermapper
155/51 Mbits/s SONET/SDH x28/x21 DS1/E1
Data Sheet
June 2002
94
Agere Systems Inc.
8 TMUX Registers
(continued)
Note:
When state bits are set in Table 101, the corresponding function has occurred.
Table 101. TMUX_RHS_STATE, State and Value Parameters (RO)
Note:
When state bits are set in
Table 102
, the corresponding function has occurred.
Address
Bit
Name
Function
Reset
Default
000
0
0x40014
15:13
12
RSVD
Reserved.
Receive Line RDI Monitor State.
See
Table 92 on
page 81
for description.
Receive Line AIS Monitor State.
See
Table 92
for
description.
Reserved.
TMUX_RHSLOSEXTI
Reflects LOSEXT Pin (AE5) Input.
TMUX_RTIMS
Reflects Section-Level Trace Identifier Mismatch State.
TMUX_RHSSF
Receive High-Speed Signal Fail BER Algorithm State.
See
Table 92
for description.
TMUX_RHSSD
Receive High-Speed Signal Degrade BER Algorithm
State.
See
Table 92
for description.
TMUX_RHSLOS
Receive High-Speed Loss of Signal State.
See
Table 92
for description.
TMUX_RHSLOF
Receive High-Speed Loss of Frame State.
See
Table 92
for description.
TMUX_RHSOOF
Receive High-Speed Out of Frame State.
See
Table 92
for description.
TMUX_RHSILOC
Receive High-Speed Loss of Input Clock State.
See
Table 92
for description.
TMUX_RLRDIMON
11
TMUX_RLAISMON
0
10:8
7
6
5
RSVD
000
—
—
0
4
0
3
0
2
0
1
0
0
0
Table 102. TMUX_RPOH[1—3]_STATE, State and Value Parameters (RO)
Address
Bit
Name
Function
Reset
Default
0
0x40015
15
TMUX_RSFB31
Receive Path Signal Fail BER Algorithm State.
See
Table 93 on page 83
for description.
Receive Path Signal Degrade BER Algorithm
State.
See
Table 93
for description.
Receive Path Unequipped State.
See
Table 93
for description.
Receive Path Payload Label Mismatch State.
See
Table 93
for description.
Reserved.
Receive Path Trace Identifier Mismatch State.
See
Table 93
for description.
Reserved.
Receive Path AIS State.
See
Table 93
for descrip-
tion.
Receive Loss of Pointer State.
See
Table 93
for
description.
14
TMUX_RSDB31
0
13
TMUX_RUNEQP1
0
12
TMUX_RPLMP1
0
11:6
5
RSVD
0x00
0
TMUX_RTIMP1
4:2
1
RSVD
000
0
TMUX_RPAIS1
0
TMUX_RLOP1
0