
SLAS671 – FEBRUARY 2010
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The TLV320DAC3100 has a short-circuit protection feature for the speaker driver that is always enabled to
provide protection. If the output is shorted, the output stage shuts down on the overcurrent condition.
(Current limiting is not an available option for the higher-current speaker-driver output stage.) In case of a
short circuit, the output is disabled and a status flag is provided as a read-only bit on page 1 / register 32,
bit D0.
If shutdown occurs due to an overcurrent condition, then the device requires a reset to re-enable the
output stage. Resetting can be done in two ways. First, the device master reset can be used, which
requires either toggling the RESETpin or using the software reset. If master reset is used, it resets all of
the registers. Second, a dedicated speaker power-stage reset can be used that keeps all of the other
device settings. The speaker power-stage reset is done by setting page 1 / register 32, bit D7 for SPKP
and SPKM. If the fault condition has been removed, then the device returns to normal operation. If the
fault is still present, then another shutdown occurs. Repeated resetting (more than three times) is not
recommended, as this could lead to overheating.
To minimize battery current leakage, the SPKVDD and SPKVDD voltage levels should not be less
than the AVDD voltage level.
The TLV320DAC3100 has a thermal protection (OTP) feature for the speaker drivers which is always
enabled to provide protection. If the device is overheated, then the output stops switching. When the
device cools down, the device resumes switching. An overtemperature status flag is provided as a
read-only bit on page 0 / register 3, bit D1. The OTP feature is for self-protection of the device. If die
temperature can be controlled at the system/board level, then overtemperature does not occur.
5.5.13 Audio Output-Stage Power Configurations
After the device has been configured (following a RESET) and the circuitry has been powered up, the
audio output stage can be powered up and powered down by register control.
These functions soft-start automatically. By using these register controls, it is possible to control these
three output-stage configurations independently.
See
Table 5-26 for register control of audio output-stage power configurations.
Table 5-26. Audio-Output Stage-Power Configurations
Audio Output Pins
Desired Function
Page 1 / Register, Bit Values
Power down HPL driver
Page 1 / register 31, bit D7 = 0
HPL
Power up HPL driver
Page 1 / register 31, bit D7 = 1
Power down HPR driver
Page 1 / register 31, bit D6 = 0
HPR
Power up HPR driver
Page 1 / register 31, bit D6 = 1
Power down mono class-D driver
Page 1 / register 32, bit D7 = 0
SPKP / SPKM
Power up mono class-D driver
Page 1 / register 32, bit D7 = 1
5.5.14 DAC Setup
The following paragraphs are intended to guide a user through the steps necessary to configure the
TLV320DAC3101.
Step 1
The system clock source (master clock) and the targeted DAC sampling frequency must be identified.
Depending on the targeted performance, the decimation filter type (A, B, or C) and DOSR value can be
determined:
Filter A should be used for 48-kHz high-performance operation; DOSR must be a multiple of 8.
Filter B should be used for up to 96-kHz operations; DOSR must be a multiple of 4.
Filter C should be used for up to 192-kHz operations; DOSR must be a multiple of 2.
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