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參數資料
| 型號： | TLV320DAC3100IRHBT |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | DAC |
| 英文描述： | DAC WITH PROGRAMMABLE PLL, PQCC32 |
| 封裝： | 5 X 5 MM, GREEN, PLASTIC, QFN-32 |
| 文件頁數： | 9/97頁 |
| 文件大小： | 1134K |
| 代理商： | TLV320DAC3100IRHBT |
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www.ti.com
SLAS671 – FEBRUARY 2010
5.2.1.5
Software Power Down
By default, all circuit blocks are powered down following a reset condition. Hardware power up of each
circuit block can be controlled by writing to the appropriate control register. This approach allows the
lowest power-supply current for the functionality required. However, when a block is powered down, all of
the register settings are maintained as long as power is still being applied to the device.
5.2.2
Audio Analog I/O
The TLV320DAC3100 has a stereo audio DAC. It supports a wide range of analog interfaces to support
different headsets and analog outputs. The TLV320DAC3100 has features to interface output drivers (8-
,
16-
, 32-). A special circuit has also been included in the TLV320DAC3100 to insert a short key-click
sound into the stereo audio output. The key-click sound is used to provide feedback to the user when a
particular button is pressed or item is selected. The specific sound of the keyclick can be adjusted by
varying several register bits that control its frequency, duration, and amplitude. See Key-Click Functionality
With Digital Sine-Wave Generator (PRB_P25), Section 5.5.7.
5.3
Digital Processing Low-Power Modes
The TLV320DAC3100 device can be tuned to minimize power dissipation, to maximize performance, or to
an operating point between the two extremes to best fit the application. The choice of processing blocks,
PRB_P1 to PRB_P25 for stereo playback, also influences the power consumption. In fact, the numerous
processing blocks have been implemented to offer a choice among configurations having a different
balance of power optimization and signal-processing capabilities.
5.3.1
DAC Playback on Headphones, Stereo, 48 kHz, DVDD = 1.8 V, AVDD = 3.3 V,
HPVDD = 3.3 V
DOSR = 128, Processing Block = PRB_P7 (Interpolation Filter B)
Power consumption = 24.28 mW
Table 5-1. PRB_P7 Alternative Processing Blocks, 24.28 mW
Processing Block
Filter
Estimated Power Change (mW)
PRB_P1
A
1.34
PRB_P2
A
2.86
PRB_P3
A
2.11
PRB_P8
B
1.18
PRB_P9
B
0.53
PRB_P10
B
1.89
PRB_P11
B
0.87
PRB_P23
A
1.48
PRB_P24
A
2.89
PRB_P25
A
3.23
Copyright 2010, Texas Instruments Incorporated
APPLICATION INFORMATION
17
Product Folder Link(s): TLV320DAC3100
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