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參數資料
| 型號： | TLV320DAC3100IRHBT |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | DAC |
| 英文描述： | DAC WITH PROGRAMMABLE PLL, PQCC32 |
| 封裝： | 5 X 5 MM, GREEN, PLASTIC, QFN-32 |
| 文件頁數： | 76/97頁 |
| 文件大小： | 1134K |
| 代理商： | TLV320DAC3100IRHBT |
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SLAS671 – FEBRUARY 2010
www.ti.com
Page 1 / Register 40 (0x28): HPL Driver
READ/
RESET
BIT
DESCRIPTION
WRITE
VALUE
D7
R/W
0
Reserved. Write only zero to this bit.
D6–D3
R/W
0000
0000: HPL driver PGA = 0 dB
0001: HPL driver PGA = 1 dB
0010: HPL driver PGA = 2 dB
...
1000: HPL driver PGA = 8 dB
1001: HPL driver PGA = 9 dB
1010–1111: Reserved. Do not write these sequences to these bits.
D2
R/W
0
0: HPL driver is muted.
1: HPL driver is not muted.
D1
R/W
1
0: HPL driver is weakly driven to a common mode during power down.
1: HPL driver is high-impedance during power down.
D0
R
0
0: Not all programmed gains to HPL have been applied yet.
1: All programmed gains to HPL have been applied.
Page 1 / Register 41 (0x29): HPR Driver
READ/
RESET
BIT
DESCRIPTION
WRITE
VALUE
D7
R/W
0
Reserved. Write only zero to this bit.
D6–D3
R/W
0000
0000: HPR driver PGA = 0 dB
0001: HPR driver PGA = 1 dB
0010: HPR driver PGA = 2 dB
...
1000: HPR driver PGA = 8 dB
1001: HPR driver PGA = 9 dB
1010–1111: Reserved. Do not write these sequences to these bits.
D2
R/W
0
0: HPR driver is muted.
1: HPR driver is not muted.
D1
R/W
1
0: HPR driver is weakly driven to a common mode during power down.
1: HPR driver is high-impedance during power down.
D0
R
0
0: Not all programmed gains to HPR have been applied yet.
1: All programmed gains to HPR have been applied.
Page 1 / Register 42 (0x2A): Class-D Speaker (SPK) Driver
READ/
RESET
BIT
DESCRIPTION
WRITE
VALUE
D7–D5
R/W
000
Reserved. Write only zeros to these bits.
D4–D3
R/W
00
00: Cass-D driver output stage gain = 6 dB
01: Class-D driver output stage gain = 12 dB
10: Class-D driver output stage gain = 18 dB
11: Class-D driver output stage gain = 24 dB
D2
R/W
0
0: Class-D driver is muted.
1: Class-D driver is not muted.
D1
R/W
0
Reserved. Write only zero to this bit.
D0
R
0
0: Not all programmed gains to class-D driver have been applied yet.
1: All programmed gains to class-D driver have been applied.
Page 1 / Register 43 (0x2B): Reserved
READ/
RESET
BIT
DESCRIPTION
WRITE
VALUE
D7–D0
R
0000 0000
Reserved. Do not use.
78
REGISTER MAP
Copyright 2010, Texas Instruments Incorporated
Product Folder Link(s): TLV320DAC3100
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