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參數資料
| 型號： | AD9874 |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 通信及網絡 |
| 英文描述： | IF Digitizing Subsystem |
| 中文描述： | SPECIALTY TELECOM CIRCUIT, PQFP48 |
| 封裝： | 1.40 MM HEIGHT, PLASTIC, TQFP-48 |
| 文件頁數： | 11/40頁 |
| 文件大小： | 744K |
| 代理商： | AD9874 |
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REV. 0
AD9874
–11–
(VDDI = VDDF = VDDA = VDDC = VDDL = VDDD = VDDH = VDDx, VDDQ = VDDP = 5.0 V, f
CLK
= 18 MSPS, f
IF
= 109.56 MHz, f
LO
= 107.4 MHz,
T
A
= 25 C, LO = –5 dBm, LO and CLK Synthesizer Disabled, 16-Bit Data with AGC and DVGA enabled, unless otherwise noted.)
1
FREQUENCY – MHz
N
13
0
6
12
11
10
9
8
7
50
500
100 150 200 250 300 350 400 450
24-BIT
16-BIT w/DVGA
TPC 13a. Noise Figure vs. Frequency
(Minimum Attenuation, f
CLK
= 18 MSPS,
BW = 10 kHz, High Bias)
FREQUENCY – MHz
N
13
0
6
12
11
10
9
8
7
50
500
100 150 200 250 300 350 400 450
24-BIT
16-BIT w/DVGA
TPC 14a. Noise Figure vs. Frequency
(Minimum Attenuation, f
CLK
= 26 MSPS,
BW = 24 kHz, High Bias)
INTERFERER LEVEL – dBm
N
20.0
–55
8.0
18.5
15.5
12.5
11.0
9.5
–5
–10
NOISE FIGURE
AGC
17.0
14.0
–15
–20
–25
–30
–35
–40
–45
–50
M
128
0
112
80
48
32
16
96
64
TPC 15a. Noise Figure vs. Interferer
Level (16-Bit Data, BW = 12.5 kHz,
AGCR = 1, f
interferer
= f
IF
+ 110 kHz)
FREQUENCY – MHz
N
13
0
6
12
11
10
9
8
7
50
500
100 150 200 250 300 350 400 450
24-BIT
16-BIT w/DVGA
TPC 13b. Noise Figure vs. Frequency
(Minimum Attenuation, f
CLK
= 18 MSPS,
BW = 10 kHz, Low Bias)
FREQUENCY – MHz
N
13
0
6
12
11
10
9
8
7
50
500
100 150 200 250 300 350 400 450
24-BIT
16-BIT w/DVGA
TPC 14b. Noise Figure vs. Frequency
(Minimum Attenuation, f
CLK
= 26 MSPS,
BW = 24 kHz, Low Bias)
INTERFERER LEVEL – dBm
N
16
8
15
13
11
10
9
–10
–15
NOISE FIGURE
AGC ATTN
14
12
–20
–25
–30
–35
–40
–45
M
256
0
224
160
96
64
32
192
128
TPC 15b. Noise Figure vs. Interferer
Level (16-Bit Data with DVGA,
BW = 12.5 kHz, AGCR = 1,
f
interferer
= f
IF
+ 110 kHz)
FREQUENCY – MHz
I
4
0
–10
2
0
–2
–4
–6
–8
50
500
100 150 200 250 300 350 400 450
LOW BIAS
HIGH BIAS
TPC 13c. Input IP3 vs. Frequency
(f
CLK
= 18 MSPS)
FREQUENCY – MHz
I
2
0
–10
0
–2
–4
–6
–8
50
500
100 150 200 250 300 350 400 450
LOW BIAS
HIGH BIAS
TPC 14c. Input IP3 vs. Frequency
(f
CLK
= 26 MSPS)
INTERFERER LEVEL – dBm
N
16
–65
8
15
13
11
10
9
–5
–15
NOISE FIGURE
AGC ATTN
14
12
–25
–35
–45
–55
M
128
0
32
96
64
TPC 15c. Noise Figure vs. Interferer
Level (24-Bit Data, BW = 12.5 kHz,
AGCR = 1, f
interferer
= f
IF
+ 110 kHz)
1
Data taken with Toko FSLM series 10
μ
H inductors
2
High Bias corresponds to LNA_Mixer Setting of 33 in SPI Register 0x01
3
Low Bias corresponds to LNA_Mixer Setting of 12 in SPI Register 0x01
相關PDF資料 |
PDF描述 |
|---|---|
| AD9874BST | IF Digitizing Subsystem |
| AD9874EB | IF Digitizing Subsystem |
| AD9875BSTRL | Broadband Modem Mixed-Signal Front End |
| AD9875 | Broadband Modem Mixed-Signal Front End |
| AD9875-EB | Broadband Modem Mixed-Signal Front End |
相關代理商/技術參數 |
參數描述 |
|---|---|
| AD9874ABST | 功能描述:IC IF DIGIT SUBSYSTEM 48-LQFP RoHS:否 類別:RF/IF 和 RFID >> RF 其它 IC 和模塊 系列:- 標準包裝:100 系列:* |
| AD9874ABST | 制造商:Analog Devices 功能描述:IF DIGITIZING SYBSYSTEM ((NW)) 制造商:Analog Devices 功能描述:IC, IF DIGITIZING SUBSYSTEM, LQFP-48 |
| AD9874ABST | 制造商:Analog Devices 功能描述:IC IF DIG SUBSYSTEM |
| AD9874ABSTRL | 功能描述:IC IF DIGIT SUBSYSTEM 48-LQFP RoHS:否 類別:RF/IF 和 RFID >> RF 其它 IC 和模塊 系列:- 標準包裝:100 系列:* |
| AD9874ABSTZ | 制造商:AD 制造商全稱:Analog Devices 功能描述:IF Digitizing Subsystem |
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