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參數(shù)資料
型號(hào)： AD9874
廠商： ANALOG DEVICES INC
元件分類： 通信及網(wǎng)絡(luò)
英文描述： IF Digitizing Subsystem
中文描述： SPECIALTY TELECOM CIRCUIT, PQFP48
封裝： 1.40 MM HEIGHT, PLASTIC, TQFP-48
文件頁(yè)數(shù)： 13/40頁(yè)
文件大小： 744K
代理商： AD9874
REV. 0
AD9874
–13–
Address
(Hex)
Bit
Breakdown
Width
Default Value
Name
Description
CLOCK SYNTHESIZER
0x10
(5:0)
6
00
CKR(13:8)
Reference Frequency Divisor (6 MSBs of a 14-Bit Word)
0x11
(7:0)
8
0x38
CKR(7:0)
Reference Frequency Divisor (8 LSBs of a 14-Bit Word)
Default Yields 300 kHz from f
REF
=16.8 MHz; Min = 3, Max = 16383.
0x12
(4:0)
5
0x00
CKN(12:8)
Synthesized Frequency Divisor (5 MSBs of a 13-Bit Word)
0x13
(7:0)
8
0x3C
CKN(7:0)
Synthesized Frequency Divisor (8 LSBs of a 13-Bit Word)
Default Yields 300 kHz from f
CLK
= 18 MHz; Min = 3, Max = 8191
0x14
(6)
(5)
(4:2)
(1:0)
1
1
3
2
0
0
0
3
CKF
CKINV
CKI
CKTM
Enable Fast Acquire
Invert Charge Pump (0 = Source Current to Increase VCO Frequency)
Charge Pump Current in Normal Operation. I
PUMP
= (CKI + 1)
×
0.625 mA
Manual Control of CLK Charge Pump (0 = Off, 1 = Up, 2 = Down, 3 = Normal)
0x15
(5:0)
6
0x0
CKFA(13:8)
CK Fast Acquire Time Unit (6 MSBs of a 14-Bit Word)
0x16
(7:0)
8
0x04
CKFA(7:0)
CK Fast Acquire Time Unit (8 LSBs of a 14-Bit Word)
SSI CONTROL
0x18
(7:0)
8
0x12
SSICRA
SSI Control Register A. See Table III. (Default is FS and CLKOUT Three-Stated)
0x19
(7:0)
8
0x07
SSICRB
SSI Control Register B. See Table III. (16-bit data, maximum drive strength)
0x1A
(3:0)
4
1
SSIORD
Output Rate Divisor. f
CLKOUT
= f
CLK
/SSIORD
ADC TUNING
0x1C
(1)
(0)
1
1
0
0
TUNE_LC
TUNE_RC
Perform Tuning on the LC Portion of the ADC (Cleared When Done)
Perform Tuning on the RC Portion of the ADC (Cleared When Done)
0x1D
(2:0)
3
0
CAPL1(2:0)
Coarse Capacitance Setting for LC Tank (LSB is 25 pF, Differential)
0x1E
(5:0)
6
0x00
CAPL0(5:0)
Fine Capacitance Setting for LC Tank (LSB is 0.4 pF, Differential)
0x1F
(7:0)
8
0x00
CAPR
Capacitance Setting for RC Resonator (64 LSBs of Fixed Capacitance)
TEST REGISTERS AND SPI PORT READ ENABLE
0x37–0x39
(7:0)
8
0x00
TEST
Factory Test Mode. Do not use.
0x3A
(7:4, 2:0)
(3)
7
1
0x0
0
TEST
SPIREN
Factory Test Mode. Do not use.
Enable Read from SPI Port
0x3B
(7:4, 2:0)
(3)
7
1
0x0
0
TEST
TRI
Factory Test Mode. Do not use.
Three-state DOUTB
0x3C–0x3E
(7:0)
1
0x00
TEST
Factory Test Mode. Do not use.
0x3F
(7:0)
8
Subject to Change
ID
Revision ID (Read-Only); A write of 0x99 to this register is equivalent to a power-on reset.
Table I. SPI Address Map (continued)
相關(guān)PDF資料
PDF描述
AD9874BST IF Digitizing Subsystem
AD9874EB IF Digitizing Subsystem
AD9875BSTRL Broadband Modem Mixed-Signal Front End
AD9875 Broadband Modem Mixed-Signal Front End
AD9875-EB Broadband Modem Mixed-Signal Front End
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AD9874ABST 功能描述:IC IF DIGIT SUBSYSTEM 48-LQFP RoHS:否 類別:RF/IF 和 RFID >> RF 其它 IC 和模塊 系列:- 標(biāo)準(zhǔn)包裝:100 系列:*
AD9874ABST 制造商:Analog Devices 功能描述:IF DIGITIZING SYBSYSTEM ((NW)) 制造商:Analog Devices 功能描述:IC, IF DIGITIZING SUBSYSTEM, LQFP-48
AD9874ABST 制造商:Analog Devices 功能描述:IC IF DIG SUBSYSTEM
AD9874ABSTRL 功能描述:IC IF DIGIT SUBSYSTEM 48-LQFP RoHS:否 類別:RF/IF 和 RFID >> RF 其它 IC 和模塊 系列:- 標(biāo)準(zhǔn)包裝:100 系列:*
AD9874ABSTZ 制造商:AD 制造商全稱:Analog Devices 功能描述:IF Digitizing Subsystem
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