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參數資料
型號: AD9874
廠商: ANALOG DEVICES INC
元件分類: 通信及網絡
英文描述: IF Digitizing Subsystem
中文描述: SPECIALTY TELECOM CIRCUIT, PQFP48
封裝: 1.40 MM HEIGHT, PLASTIC, TQFP-48
文件頁數: 34/40頁
文件大小: 744K
代理商: AD9874
REV. 0
–34–
AD9874
This second IF signal is then digitized by the - ADC, demodu-
lated into its quadrature I and Q components, filtered via matching
decimation filters, and reformatted to enable a synchronous serial
interface to a DSP. In this example, the AD9874’s LO and CLK
synthesizers are both enabled requiring some additional passive
components (for the synthesizer’s loop filters and CLK oscillator)
and a VCO for the LO synthesizer. Note, not all of the required
decoupling capacitors are shown. Refer to the previous section
and Figure 26 for more information on required external passive
components.
The selection of the first IF frequency is often based on the avail-
ability of low cost standard crystal or SAW filters as well as system
frequency planning considerations. In general, crystal filters are
often used for narrow-band radios having channel bandwidths below
50 kHz with IFs below 120 MHz, while SAW filters are more
suited for channel bandwidths greater than 50 kHz with IFs greater
than 70 MHz. The ultimate stop-band rejection required by the
IF filter will depend on how much suppression is required at the
AD9874’s image band resulting from downconversion to the
second IF. This image band is offset from the first IF by twice the
second IF frequency (i.e.,
±
f
CLK
/4 depending on high or low side
injection).
RF
INPUT
PRESELECT
FILTER
TUNER
ISAW FILTER
VDDA
- ADC
LNA
VCO
ADF42xx
PLL SYN
REFIN
TO
DSP
AD9874
DECIMATION
FILTER
SAMPLE CLOCK
SYNTHESIZER
I
LOOP
FILTER
L
L
VCO
LOOP
FILTER
VDDC
I
C
C
FROM DSP
LO
SYNTH.
VOLTAGE
REFERENCE
SPI
R
V
V
S
P
P
P
CRYSTAL
OSCILLATOR
IFIN
–16dB
LNA
V
V
I
I
DAC AGC
FORMATTING/SSI
DOUTA
DOUTB
FS
CLKOUT
CONTROL LOGIC
G
G
IF2 =
f
CLK
/8
Figure 27 Typical Dual Conversion Superheterodyne Application Using the AD9874
The selectivity and bandwidth of the IF filter will depend on both
the magnitude and frequency offset(s) of the adjacent channel
blocker(s) that could overdrive the AD9874’s input or generate
in-band intermodulation components. Further suppression is
performed within the AD9874 by its inherent band-pass response
and digital decimation filters. Note, some applications will require
additional application-specific filtering performed in the DSP
that follows the AD9874 to remove the adjacent channel and/or
implement a matched filter for optimum signal detection.
The output data rate of the AD9874,
f
OUT
, should be chosen to
be at least twice the bandwidth or symbol rate of the desired signal
to ensure that the decimation filters provide a flat pass-band
response as well as to allow for post-processing by a DSP. Once
f
OUT
is determined, the decimation factor of the digital filters
should be set such that the input clock rate,
f
CLK
, falls between
the AD9874’s rated operating range of 13 MHz–26 MHz and no
significant spurious products related to
f
CLK
fall within the
desired pass band resulting in a reduction in sensitivity perfor-
mance. If a spurious component is found to limit the sensitivity
performance, the decimation factor can often be modified
slightly to find a “spurious free” pass band. In general, selecting
相關PDF資料
PDF描述
AD9874BST IF Digitizing Subsystem
AD9874EB IF Digitizing Subsystem
AD9875BSTRL Broadband Modem Mixed-Signal Front End
AD9875 Broadband Modem Mixed-Signal Front End
AD9875-EB Broadband Modem Mixed-Signal Front End
相關代理商/技術參數
參數描述
AD9874ABST 功能描述:IC IF DIGIT SUBSYSTEM 48-LQFP RoHS:否 類別:RF/IF 和 RFID >> RF 其它 IC 和模塊 系列:- 標準包裝:100 系列:*
AD9874ABST 制造商:Analog Devices 功能描述:IF DIGITIZING SYBSYSTEM ((NW)) 制造商:Analog Devices 功能描述:IC, IF DIGITIZING SUBSYSTEM, LQFP-48
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AD9874ABSTRL 功能描述:IC IF DIGIT SUBSYSTEM 48-LQFP RoHS:否 類別:RF/IF 和 RFID >> RF 其它 IC 和模塊 系列:- 標準包裝:100 系列:*
AD9874ABSTZ 制造商:AD 制造商全稱:Analog Devices 功能描述:IF Digitizing Subsystem
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