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參數(shù)資料
| 型號： | AD9874 |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 通信及網絡 |
| 英文描述： | IF Digitizing Subsystem |
| 中文描述： | SPECIALTY TELECOM CIRCUIT, PQFP48 |
| 封裝： | 1.40 MM HEIGHT, PLASTIC, TQFP-48 |
| 文件頁數(shù)： | 21/40頁 |
| 文件大小： | 744K |
| 代理商： | AD9874 |
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REV. 0
AD9874
–21–
–25
0
–90
–100
–110
–120
d
–20
–15
–10
FREQUENCY OFFSET – kHz
–5
0
5
10
15
20
25
CKI = 0
–80
–70
–60
–50
–40
–30
–20
–10
CKI = 2
CKI = 6
EXT CLK
CKI = 4
Figure 7c. CLK Phase Noise vs. Charge Pump Setting Bias
(CLK SYN Settings: CKO Bias = 3, CKR = 56, and CKN = 60
with f
REF
= 100kHz)
Table VIII. SPI Registers Associated with CLK Synthesizer
Address
(Hex)
Bit
Breakdown Width
Default
Value
Name
0x00
(7:0)
8
0xFF
STBY
0x01
(3:2)
2
0
CKOB
0x10
(5:0)
6
00
CKR(13:8)
0x11
(7:0)
8
0x38
CKR(7:0)
0x12
(4:0)
5
0x00
CKN(12:8)
0x13
(7:0)
8
0x3C
CKN(7:0)
0x14
(6)
(5)
(4:2)
(1:0)
1
1
3
1
0
0
0
0
CKF
CKINV
CKI
CKTM
0x15
(3:0)
4
0x0
CKFA(13:8)
0x16
(7:0)
8
0x04
CKFA(7:0)
IF LNA/MIXER
The AD9874 contains a single-ended LNA followed by a Gilbert-
type active mixer, shown in Figure 8 with the required external
components. The LNA uses negative shunt feedback to set its
input impedance at the IFIN Pin, thus making it dependent on the
LNA bias setting and input frequency. It can be modeled as
approximately 370
//1.4 pF ( 20%) for the higher bias settings
below 100 MHz. Figures 9a and 9b show the equivalent input
impedance versus frequency characteristics of the AD9874 with
all the LNA bias settings. The increase in shunt resistance ver-
sus frequency can be attributed to the reduction in bandwidth,
thus the amount of negative feedback of the LNA. Note, the
input signal into IFIN should be ac-coupled via a 10 nF capaci-
tor since the LNA input is self-biasing.
R
F
IFIN
R
GAIN
R
BIAS
VDDI
MXOP
LO INPUT =
0.3V p-p TO
1.0V p-p
DC SERVO
LOOP
MULTI-TANH
V–I STAGE
CXIF
MXON
CXVM
50
C
L
L
CXVL
2.7V TO 3.6V
Figure 8. Simplified Schematic of AD9874’s LNA/Mixer
FREQUENCY – MHz
500
100
400
600
200
R
0
550
450
150
50
350
300
350
300
250
LNA BIAS = 0
LNA BIAS = 1
LNA BIAS = 2
LNA BIAS = 3
Figure 9a. The Shunt Input Resistance vs. the
Frequency of the AD9874’s IF1 Input
FREQUENCY – MHz
1.5
100
0.5
2.5
200
C
0
2.0
1.0
150
50
0
350
300
250
LNA BIAS = 3
LNA BIAS = 2
LNA BIAS = 1
LNA BIAS = 0
Figure 9b. The Shunt Capacitance vs.
the Frequency of the AD9874’s IF1 Input
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| AD9874BST | IF Digitizing Subsystem |
| AD9874EB | IF Digitizing Subsystem |
| AD9875BSTRL | Broadband Modem Mixed-Signal Front End |
| AD9875 | Broadband Modem Mixed-Signal Front End |
| AD9875-EB | Broadband Modem Mixed-Signal Front End |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| AD9874ABST | 功能描述:IC IF DIGIT SUBSYSTEM 48-LQFP RoHS:否 類別:RF/IF 和 RFID >> RF 其它 IC 和模塊 系列:- 標準包裝:100 系列:* |
| AD9874ABST | 制造商:Analog Devices 功能描述:IF DIGITIZING SYBSYSTEM ((NW)) 制造商:Analog Devices 功能描述:IC, IF DIGITIZING SUBSYSTEM, LQFP-48 |
| AD9874ABST | 制造商:Analog Devices 功能描述:IC IF DIG SUBSYSTEM |
| AD9874ABSTRL | 功能描述:IC IF DIGIT SUBSYSTEM 48-LQFP RoHS:否 類別:RF/IF 和 RFID >> RF 其它 IC 和模塊 系列:- 標準包裝:100 系列:* |
| AD9874ABSTZ | 制造商:AD 制造商全稱:Analog Devices 功能描述:IF Digitizing Subsystem |
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