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參數資料
| 型號： | AFE7222EVM |
| 廠商： | Texas Instruments |
| 文件頁數： | 80/106頁 |
| 文件大小： | 0K |
| 描述： | EVAL MODULE FOR AFE7222 |
| 標準包裝： | 1 |
| 主要目的： | 接口，模擬前端（AFE） |
| 嵌入式： | 否 |
| 已用 IC / 零件： | AFE7222 |
| 已供物品： | 板 |
| 其它名稱： | 296-30300 AFE7222EVM-ND |
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IDAC
IOUTP_A_DAC
IOUTN_A_DAC
External Termination
I
= 16 * (VREF/RBIAS), where VREF = 1.2 V
OUTFS
SLOS711B – NOVEMBER 2011 – REVISED MARCH 2012
IOUTFS = 16 × (VREF/RBIAS), where VREF = 1.2V.
Figure 9-8. Current Steering Architecture of DAC
9.10 FIFO
The 8-Deep FIFO is used to handoff the data from the digital clock (DAC_DCLKIN) domain to the
DAC_CLK domain (or the divided version of DAC_CLK if interpolation is used). The FIFO has a read and
write pointer, which are initialized to 4 away from each other when the chip is either reset or synchronized.
The write pointer increments with DAC_DCLKIN whereas the read pointer increments with DAC_DCLKIN
(or the divided version). Ideally, the read and write pointers maintain the difference of 4. However, if there
is a drift in the relative phases of the two clocks, the instantaneous values of the read and write pointers
can differ from 4. If the pointers come to within 2 positions of each other, the FIFO can be set to identify
that condition as a possible "collision" condition and can shut off the DAC outputs by pulling it to mid code.
A stoppage of the input clock can also be detected by the FIFO.
9.11 TRANSMIT INTERPOLATION FILTERS
The AFE7225/7222 can enable 2x or 4x interpolation using on-chip half-band interpolation filters. The
additional oversampling provided by interpolation can be used to reduce the order of the low pass anti-
aliasing filter that follows the transmit DACs or so that the digital carrier can be block shifted by the coarse
mixer to a higher output IF.
While interpolating by a factor of 2, the DAC_DCLKIN rate should be set to half of the input clock rate.
While interpolating by a factor of 4, the DAC_DCLKIN rate should be set to one fourth of the input clock
rate.
Each channel has two filters TxFIR1, and TxFIR2, of which TxFIR1 alone is enabled in the Interpolate by
2 mode, Both filters are enabled in Intertpolate by 4 mode. The 2 filters in each of the two channels can
individually be configured to operate in the ‘low pass ‘ or the high pass mode. By default, all filters are
configured to opearate in the low pass mode. The following table lists the address and data mask values
to be programmed to configure each of these filters in the high pass mode.
TXFIR1 is a 43 tap half-band filter. The transition band is from 0.4 to 0.6 of FCLKFIR1/2, and the stop band
attenuation is 70 dB. Pass band ripple is less than 0.1dB. It has the following coefficients (listed only up to
the middle one)
TXFIR1 (interpolation filter 1)
coefficients = [12 0 –33 0 73 0 –143 0 254 0 –426 0 685 0 –1090 0 1781 0 –3286 0 10365 16384 ]
The frequency response is shown below.
Copyright 2011–2012, Texas Instruments Incorporated
APPLICATION INFORMATION
75
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相關代理商/技術參數 |
參數描述 |
|---|---|
| AFE7222IRGC25 | 功能描述:射頻前端 Dual 12B,65MSPS ADC RoHS:否 制造商:Skyworks Solutions, Inc. 類型: 工作頻率:2.4 GHz, 5 GHz 最大數據速率:54 Mbps 噪聲系數: 工作電源電壓:3.3 V 電源電流:180 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-32 |
| AFE7222IRGCR | 功能描述:射頻前端 Dual 12B,65MSPS ADC RoHS:否 制造商:Skyworks Solutions, Inc. 類型: 工作頻率:2.4 GHz, 5 GHz 最大數據速率:54 Mbps 噪聲系數: 工作電源電壓:3.3 V 電源電流:180 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-32 |
| AFE7222IRGCT | 功能描述:射頻前端 Dual 12B,65MSPS ADC RoHS:否 制造商:Skyworks Solutions, Inc. 類型: 工作頻率:2.4 GHz, 5 GHz 最大數據速率:54 Mbps 噪聲系數: 工作電源電壓:3.3 V 電源電流:180 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-32 |
| AFE7225 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:Analog Front End Wideband Mixed-Signal Transceiver |
| AFE7225EVM | 功能描述:射頻開發工具 AFE7225 Eval Mod RoHS:否 制造商:Taiyo Yuden 產品:Wireless Modules 類型:Wireless Audio 工具用于評估:WYSAAVDX7 頻率: 工作電源電壓:3.4 V to 5.5 V |
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