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參數資料
型號: MC68B912B32FU8
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 16-Bit Microcontroller
中文描述: 16-BIT, FLASH, 8 MHz, MICROCONTROLLER, PQFP80
封裝: QFP-80
文件頁數: 103/128頁
文件大小: 748K
代理商: MC68B912B32FU8
MC68HC912B32
MC68HC912B32TS/D
MOTOROLA
103
Decreases the CPU overhead associated with servicing interrupts while operating a serial communica-
tion protocol. It provides an index offset that is directly related to the BDLC’s current state.
I0, I1, I2, I3 — Interrupt Source
Source of the pending interrupt request. Bits are encoded according to
Table 35
.
Bits I0, I1, I2, and I3 are cleared by a read of the BSVR register except when the BDLC data register
needs servicing (RDRF, RXIFR, or TDRE conditions). RXIFR and RDRF can only be cleared by a read
of the BSVR register followed by a read of BDR. TDRE can either be cleared by a read of the BSVR
register followed by a write to the BDLC BDR register, or by setting the TEOD bit in BCR2.
Upon receiving a BDLC interrupt, the user may read the value within the BSVR, transferring it to the
CPU’s index register. The value can be used to index a jump table to access a service routine. For ex-
ample:
SERVICE
LDX
JMP
BSVR
JMPTAB,X
Fetch State Vector Number
Enter service routine,
(must end in an RTI)
*
*
JMPTAB
JMP
NOP
JMP
NOP
JMP
NOP
.
.
.
JMP
END
SERVE0
Service condition #0
SERVE1
Service condition #1
SERVE2
Service condition #2
SERVE8
Service condition #8
NOP instructions are used to align the JMP instructions onto 4-byte boundaries so that the value in the
BSVR may be used intact. Each of the service routines must end with an RTI instruction.
BSVR —
BDLC State Vector Register
$00F9
Bit 7
6
5
4
3
2
1
Bit 0
0
0
I3
I2
I1
I0
0
0
RESET:
0
0
0
0
0
0
0
0
Table 35 Interrupt Sources
BSVR
$00
$04
$08
$0C
$10
$14
$18
$1C
$20
I3
0
0
0
0
0
0
0
0
1
I2
0
0
0
0
1
1
1
1
0
I1
0
0
1
1
0
0
1
1
0
I0
0
1
0
1
0
1
0
1
0
Interrupt Source
No Interrupts Pending
Received EOF
Received IFR byte (RXIFR)
Rx data register full (RDRF)
Tx data register empty (TDRE)
Loss of arbitration
CRC error
Symbol invalid or out of range
Wakeup
Priority
0 (lowest)
1
2
3
4
5
6
7
8 (highest)
相關PDF資料
PDF描述
MC68C912B32CFU8 16-Bit Microcontroller
MC68CK338 Highly Integrated, Low-Power, 32-Bit Microcontroller
MC68EC060 32-Bit Microprocessors.(32位微處理器)
MC68EN360RC25V QUad Integrated Communications Controller Users Manual
MC68EN360CFE25 QUad Integrated Communications Controller Users Manual
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