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參數(shù)資料
| 型號： | MC68B912B32FU8 |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-Bit Microcontroller |
| 中文描述： | 16-BIT, FLASH, 8 MHz, MICROCONTROLLER, PQFP80 |
| 封裝： | QFP-80 |
| 文件頁數(shù)： | 29/128頁 |
| 文件大小： | 748K |
| 代理商： | MC68B912B32FU8 |
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MC68HC912B32
MC68HC912B32TS/D
MOTOROLA
29
MMSWAI — Memory Mapping Interface Stop in Wait Control
This bit controls access to the memory mapping interface when in Wait mode.
0 = Memory mapping interface continues to function during Wait mode.
1 = Memory mapping interface access is shut down during Wait mode.
5.3.2 RAM Mapping
The MC68HC912B32 has 1 Kbyte of fully static RAM that is used for storing instructions, variables, and
temporary data during program execution. After reset, RAM addressing begins at location $0800 but
can be assigned to any 2-Kbyte boundary within the standard 64-Kbyte address space. Mapping of in-
ternal RAM is controlled by five bits in the INITRM register. The RAM array occupies the first 1 Kbyte
of the 2-Kbyte block.
RAM[15:11] — Internal RAM Map Position
These bits specify the upper five bits of the 16-bit RAM address.
Write once in normal modes or anytime in special modes. Read anytime.
5.3.3 EEPROM Mapping
The MC68HC912B32 has 768 bytes of EEPROM which is activated by the EEON bit in the INITEE reg-
ister.
Mapping of internal EEPROM is controlled by four bits in the INITEE register. After reset EEPROM ad-
dress space begins at location $0D00 but can be mapped to any 4-Kbyte boundary within the standard
64-Kbyte address space.
EE[15:12] — Internal EEPROM map position
These bits specify the upper four bits of the 16-bit EEPROM address.
Write once in normal modes or anytime in special modes. Read anytime.
EEON — Internal EEPROM On (Enabled)
The EEON bit allows read access to the EEPROM array. EEPROM control registers can be accessed
and EEPROM locations may be programmed or erased regardless of the state of EEON.
This bit is forced to one in single-chip modes. Read or write anytime.
0 = Removes the EEPROM from the map
1 = Places the on-chip EEPROM in the memory map
5.3.4 Flash EEPROM and Expansion Address Mapping
Additional mapping controls are available that can be used in conjunction with Flash EEPROM and
memory expansion.
INITRM —
Initialization of Internal RAM Position Register
$0010
Bit 7
6
5
4
3
2
1
Bit 0
RAM15
RAM14
RAM13
RAM12
RAM11
0
0
0
RESET:
0
0
0
0
1
0
0
0
INITEE —
Initialization of Internal EEPROM Position Register
$0012
Bit 7
6
5
4
3
2
1
Bit 0
EE15
EE14
EE13
EE12
0
0
0
EEON
RESET:
0
0
0
0
0
0
0
1
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