- 您現在的位置：買賣IC網 > PDF目錄382345 > MPC750 (Motorola, Inc.) Hall Effect Switch IC; Package/Case:3-SOT-23; Supply Voltage Max:24V; Current Rating:4mA; Leaded Process Compatible:Yes; Operate Point Max:90G; Operate Point Min:-90G; Operational Type:Latch; Peak Reflow Compatible (260 C):Yes RoHS Compliant: Yes PDF資料下載
參數資料
| 型號： | MPC750 |
| 廠商： | Motorola, Inc. |
| 英文描述： | Hall Effect Switch IC; Package/Case:3-SOT-23; Supply Voltage Max:24V; Current Rating:4mA; Leaded Process Compatible:Yes; Operate Point Max:90G; Operate Point Min:-90G; Operational Type:Latch; Peak Reflow Compatible (260 C):Yes RoHS Compliant: Yes |
| 中文描述： | MPC750 RISC微處理器 |
| 文件頁數： | 6/31頁 |
| 文件大小： | 318K |
| 代理商： | MPC750 |
第1頁第2頁第3頁第4頁第5頁當前第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁
6
MPC750 RISC Microprocessor Technical Summary
For More Information On This Product,
Go to: www.freescale.com
Separate memory management units (MMUs) for instructions and data
— 52-bit virtual address; 32-bit physical address
— Address translation for 4-Kbyte pages, variable-sized blocks, and 256-Mbyte segments
— Memory programmable as write-back/write-through, cacheable/noncacheable, and coherency
enforced/coherency not enforced on a page or block basis
— Separate IBATs and DBATs (four each) also defined as SPRs
— Separate instruction and data translation lookaside buffers (TLBs)
– Both TLBs are 128-entry, two-way set associative, and use LRU replacement algorithm
– TLBs are hardware reloadable (that is, the page table search is performed in hardware)
Separate bus interface units for system memory and for the L2 cache
— Bus interface features include the following:
– Selectable bus-to-core clock frequency ratios of 2x, 2.5x, 3x, 3.5x, 4x, 4.5x ... 8x. (2x to 8x,
all half-clock multipliers in-between)
– A 64-bit, split-transaction external data bus with burst transfers
– Support for address pipelining and limited out-of-order bus transactions
– Single-entry load queue
– Single-entry instruction fetch queue
– Two-entry L1 cache castout queue
– No-DRTRY mode eliminates the DRTRY signal from the qualified bus grant. This allows
the forwarding of data during load operations to the internal core one bus cycle sooner than
if the use of DRTRY is enabled.
— L2 cache interface features (which are not implemented on the MPC740) include the following:
– Core-to-L2 frequency divisors of 1, 1.5, 2, 2.5, and 3
– Four-entry L2 cache castout queue in L2 cache BIU
– 17-bit address bus
– 64-bit data bus
Multiprocessing support features include the following:
— Hardware-enforced, three-state cache coherency protocol (MEI) for data cache.
— Load/store with reservation instruction pair for atomic memory references, semaphores, and
other multiprocessor operations
Power and thermal management
— Three static modes, doze, nap, and sleep, progressively reduce power dissipation:
– Doze—All the functional units are disabled except for the time base/decrementer registers
and the bus snooping logic.
– Nap—The nap mode further reduces power consumption by disabling bus snooping, leaving
only the time base register and the PLL in a powered state.
– Sleep—All internal functional units are disabled, after which external system logic may
disable the PLL and SYSCLK.
F
Freescale Semiconductor, Inc.
n
.
相關PDF資料 |
PDF描述 |
|---|---|
| MPC823 | Communication Processor Module |
| MPC823UM_REV1_16-CPM7 | 10 AMP SUBMINIATURE POWER RELAY |
| MPC9109 | LOW VOLTAGE 1:18 CLOCK DISTRIBUTION CHIP |
| MPC9229 | 400 MHz Low Voltage PECL Clock Synthesizer |
| MPC9230 | 800 MHz Low Voltage PECL Clock Synthesizer |
相關代理商/技術參數 |
參數描述 |
|---|---|
| MPC75-103J | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Metal Plate Cement Resistors |
| MPC75-103K | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Metal Plate Cement Resistors |
| MPC75201J | 功能描述:厚膜電阻器 - 透孔 MPC7 200R 5% RoHS:否 制造商:Caddock 電阻:27 kOhms 容差:1 % 功率額定值:8 W 溫度系數:50 PPM / C 系列:MS 端接類型:Axial 電壓額定值:2 kV 工作溫度范圍:- 15 C to + 275 C 尺寸:8.89 mm Dia. x 23.11 mm L 封裝:Bulk |
| MPC755 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:RISC Microprocessor Hardware Specifications |
| MPC755BPX300LE | 功能描述:微處理器 - MPU 360PBGA RV2.8 HIP4DP RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數據總線寬度:32 bit 最大時鐘頻率:536 MHz 程序存儲器大小:32 KB 數據 RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-324 |
發布緊急采購，3分鐘左右您將得到回復。