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參數資料
型號: PCF5083
廠商: NXP Semiconductors N.V.
英文描述: STEEL COVER
中文描述: GSM信號處理IC
文件頁數: 43/136頁
文件大?。?/td> 602K
代理商: PCF5083
1996 Oct 29
43
Philips Semiconductors
Objective specification
GSM signal processing IC
PCF5083
9
DESCRIPTION OF THE DSP CORE
9.1
Interface description
9.1.1
B
ASEBAND
D
IGITIZER
I
NTERFACE
The PCF5083 serial input port SIX is used for the reception
of off-air data from the baseband digitizer PCF5072 (BBD).
The port consists of:
Serial Input Data signal (SIXD), containing 16I and 16Q
data bits, MSB first
Serial Input Clock signal (SIXCLK), running at 13 MHz
Serial Input Enable signal (SIXEN), active LOW.
Regularly spaced I and Q samples are sent to the DSP
with a periodicity of 1/(2 270.833 kHz); (twice the GSM bit
period). The number of incoming samples expected by the
DSP depends upon the current status in which the DSP is
operating (see Table 27).
The column START OF SAMPLING indicates in which
time slot (1 time slot = 1/8 TDMA frame = 577
μ
s) the
sampling of the I and Q pairs has to start.
Time slots are numbered from 0 to 7, whereby slot 0 is
defined as the receive time slot of the mobile station (see
Section 8.3.2.1).
Each I/Q component pair is represented by two 16-bit
two’s complement numbers, as shown in Table 28, with
one sign bit (I15 and Q15) and 15 fractional bits. The range
for the I and Q components is specified below.
Range:
1.0
I,Q < +1.0
It should be noted that due to the limited SNR of the
PCF5072 of 66 dB, only the 11 MSBs of I and Q contain
meaningful data.
The I and Q components are defined as follows:
I = f(A)
×
cos
Φ
Q = f(A)
×
sin
Φ
where A is the magnitude and
Φ
is the phase of the
antenna input signal. The function f(A) describes the
characteristic of the AGC applied (see Fig.16).
Table 27
Time window for BBD output data
Note
1.
The value 1404 for FCB search is the default value after reset. It can be changed by the FB_search_fcb_init
procedure.
Table 28
I and Q component format
OPERATION STATUS
START OF SAMPLING
NUMBER OF I AND Q PAIRS
Reception of a normal burst
Reception of a synchronization burst
Reception of a normal burst
Level measurement of neighbouring BCCH
DC offset measurement
FCB search
TS 0
TS 0
TS 5
TS 5
TS 6
149
167
167
80
128
1404
(1)
(9
×
156)
BIT
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
I
I15
O15
I14
O14
I13
O13
I12
O12
I11
O11
I10
O10
I9
O9
I8
O8
I7
O7
I6
O6
I5
O5
I4
O4
I3
O3
I2
O2
I1
O1
I0
O0
O
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PCF51AC128ACFUE 功能描述:32位微控制器 - MCU 32 Bit 128K FLASH 32K RAM CAN EN RoHS:否 制造商:Texas Instruments 核心:C28x 處理器系列:TMS320F28x 數據總線寬度:32 bit 最大時鐘頻率:90 MHz 程序存儲器大小:64 KB 數據 RAM 大小:26 KB 片上 ADC:Yes 工作電源電壓:2.97 V to 3.63 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:LQFP-80 安裝風格:SMD/SMT
PCF51AC128ACLKE 功能描述:32位微控制器 - MCU 32 Bit 128K FLASH 32K RAM CAN EN RoHS:否 制造商:Texas Instruments 核心:C28x 處理器系列:TMS320F28x 數據總線寬度:32 bit 最大時鐘頻率:90 MHz 程序存儲器大小:64 KB 數據 RAM 大小:26 KB 片上 ADC:Yes 工作電源電壓:2.97 V to 3.63 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:LQFP-80 安裝風格:SMD/SMT
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