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參數(shù)資料
| 型號(hào)： | AD9854 |
| 廠商： | Analog Devices, Inc. |
| 元件分類： | XO, clock |
| 英文描述： | CMOS 300MHz Quadrature Complete-DDS |
| 中文描述： | 300MHz CMOS正交DDS數(shù)字合成器 |
| 文件頁(yè)數(shù)： | 23/28頁(yè) |
| 文件大小： | 589K |
| 代理商： | AD9854 |
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AD9854 PRELIMINARY TECHNICAL DATA
_____________________________________________________________________________________________________
7/16/99 REV.PRA
23
Figure 3. Using SDIO as an Input, SDO as an Output
SDIO
CS
INSTRUCTION
BYTE
DATA BYTE 1
DATA BYTE 2
DATA BYTE 3
DATA TRANSFER
INSTRUCTION
CYCLE
SDO
Instruction Byte
The instruction byte contains the following information:
Instruction Byte Information
MSB D6 D5 D4 D3 D2 D1 LSB
__
R/W
X
X
X
__
R/W - Bit 7 of the instruction byte determines whether a
read or write data transfer will occur after the instruction
byte write. Logic high indicates read operation. Logic zero
indicates a write operation.
A3
A2
A1
A0
Bits 6, 5 and 4 of the instruction byte are don’t care.
A3, A2, A1, A0 – Bits 3, 2, 1, 0 of the instruction byte
determine which register is accessed during the data
transfer portion of the communications cycle. See Table 1
for register address details
Serial Interface Port Pin Description
SCLK
- Serial Clock (Pin21). The serial clock pin is used
to synchronize data to and from the AD9854/52 and to run
the internal state machines. SCLK maximum frequency is
10 MHz.
CS
- Chip Select (Pin 22). Active low input that allows
more than one device on the same serial communications
lines. The SDO and SDIO pins will go to a high
impedance state when this input is high. If driven high
during any communications cycle, that cycle is suspended
until CS is reactivated low. Chip Select can be tied low in
systems that maintain control of SCLK.
SDIO
- Serial Data I/O (Pin 19). Data is always written
into the AD9854/52 on this pin. However, this pin can be
used as a bi-directional data line. The configuration of this
pin is controlled by bit 1 of register address 20h. The
default is logic zero, which configures the SDIO pin as bi-
directional.
SDO
- Serial Data Out (Pin 18). Data is read from this pin
for protocols that use separate lines for transmitting and
receiving data. In the case where the AD9854/52 operates
in a single bi-directional I/O mode, this pin does not output
data and is set to a high impedance state.
SYNC I/O
– Synchronize IO Port (Pin 17). Synchronizes
the I/O port state machines without affecting the
addressable registers contents. An active high input on
SYNC I/O pin causes the current communication cycle to
terminate. After SYNC I/O returns low (logic 0) another
communication cycle may begin, starting with the
instruction byte write.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD9854/PCB | 制造商:Analog Devices 功能描述:Evaluation Board For IC Digital Synthesizer Single 制造商:Analog Devices 功能描述:Direct Digital Synthesizer IC (DDS) |
| AD9854/PCBZ | 功能描述:BOARD EVAL FOR AD9854 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評(píng)估演示板和套件 系列:AgileRF™ 標(biāo)準(zhǔn)包裝:1 系列:PCI Express® (PCIe) 主要目的:接口，收發(fā)器，PCI Express 嵌入式:- 已用 IC / 零件:DS80PCI800 主要屬性:- 次要屬性:- 已供物品:板 |
| AD9854ASQ | 制造商:Analog Devices 功能描述:IC DDS SYNTHESIZER |
| AD9854ASQZ | 制造商:Analog Devices 功能描述:Direct Digital Synthesizer 300MHz 2-DAC 12-Bit Parallel/Serial 80-Pin LQFP 制造商:Analog Devices 功能描述:Communication IC |
| AD9854AST | 制造商:Analog Devices 功能描述:Direct Digital Synthesizer 300MHz 2-DAC 12-Bit Parallel/Serial 80-Pin LQFP Tray 制造商:Rochester Electronics LLC 功能描述:200 MHZ QUADRATURE DDS SYNTHESIZER - Tape and Reel 制造商:Analog Devices 功能描述:IC SEMICONDUCTOR ((NS)) |
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