欧美成人免费电影,国产欧美一区二区三区精品酒店,精品国产a毛片,色网在线免费观看

參數資料
型號: AD9898KCPRL-20
廠商: ANALOG DEVICES INC
元件分類: 消費家電
英文描述: TVPS00RF-21-41S W/ PC CON
中文描述: SPECIALTY CONSUMER CIRCUIT, QCC48
封裝: MO-220-VKKD-2, LFCSP-48
文件頁數: 23/52頁
文件大?。?/td> 557K
代理商: AD9898KCPRL-20
REV. 0
AD9898
–23–
EXTERNAL SYNCHRONIZATION (MASTER MODE)
External synchronization can be used to synchronize the VD
and HD signal by applying an external pulse on the SYNC/
VGATE pin (Pin 45) for master mode operation. The SYNC/
VGATE pin is configured as an external SYNC input for mas-
ter mode operation by setting the SLAVE_MODE register
(Addr 0xD6) = 0. (The AD9898 defaults to slave mode at
power-up.)
SYNCCNT (Addr 0x0A) and SYNCPOL (Addr 0x01) are the
only two registers used for configuring the AD9898 for external
synchronization. The SYNCPOL is a 1-bit register used for
configuring the SYNC input as either active low or active high.
The AD9898 defaults to active low at power-up. The function
of the SYNCCNT register is described in Table X. Figures 16
and 17 provide two examples of external synchronization with
SYNCPOL = 0.
Table X. External Synchronization (Master Mode)
SYNCCNT
External Synchronization Options
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
Disable External Synchronization
VD Sync at every SYNC Pulse
VD Sync after Second Applied SYNC Pulse
VD Sync after Third Applied SYNC Pulse
VD Sync after Fourth Applied SYNC Pulse
VD Sync after Fifth Applied SYNC Pulse
VD Sync after Sixth Applied SYNC Pulse
VD Sync after Seventh Applied SYNC Pulse
VD Sync after Eighth Applied SYNC Pulse
VD Sync after Ninth Applied SYNC Pulse
VD Sync after Tenth Applied SYNC Pulse
VD Sync after Eleventh Applied SYNC Pulse
VD Sync after Twelfth Applied SYNC Pulse
VD Sync after Thirteenth Applied SYNC Pulse
VD Sync after Fourteenth Applied SYNC Pulse
VD Sync after First Applied SYNC Pulse Only
2 CLI
MIN
MODE A
MODE B
SERIAL
WRITES
OPERATION
MODE
VD
4 CLI
4 CLI
4 CLI
CHANGE TO MODE B
SYNC
Figure 16. Example of Synchronization with SYNCPOL = 0 and SYNCCNT = 1
4 CLI
4 CLI
4 CLI
2 CLI
MIN
VD
SYNC
Figure 17. Example of Synchronization with SYNCPOL = 0 and SYNCCNT = 3
相關PDF資料
PDF描述
AD9901 Ultrahigh Speed Phase/Frequency Discriminator
AD9901KP Ultrahigh Speed Phase/Frequency Discriminator
AD9901KQ TVS Diode; Diode Type:Bidirectional TVS; Stand-Off Voltage, VRWM:30V; Breakdown Voltage, Vbr:33.3V; Package/Case:DO-214AB; Leaded Process Compatible:Yes; No. of Lines Protected Max:1; Peak Pulse Power PPK @ 10x1000uS:1500W RoHS Compliant: Yes
AD9910 1 GSPS, 14-Bit, 3.3 V CMOS Direct Digital Synthesizer
AD9910_07 1 GSPS, 14-Bit, 3.3 V CMOS Direct Digital Synthesizer
相關代理商/技術參數
參數描述
AD9899ARS-2 制造商:Analog Devices 功能描述:
AD9901 制造商:AD 制造商全稱:Analog Devices 功能描述:Ultrahigh Speed Phase/Frequency Discriminator
AD9901KP 制造商:Analog Devices 功能描述:PLL Frequency Synthesizer Single 20-Pin PLCC 制造商:Rochester Electronics LLC 功能描述:IC VHF PHCOMP AD9901 IC - Bulk 制造商:Analog Devices 功能描述:IC DISCRIMINATOR
AD9901KP-REEL 制造商:Analog Devices 功能描述:PLL Frequency Synthesizer Single 20-Pin PLCC T/R 制造商:Rochester Electronics LLC 功能描述:PHASE FREQ COMPARATOR IC - Tape and Reel
AD9901KPZ 功能描述:IC PHS/FREQ DISCRIMINATOR 20PLCC RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發生器,PLL,頻率合成器 系列:- 標準包裝:2,000 系列:- 類型:PLL 頻率合成器 PLL:是 輸入:晶體 輸出:時鐘 電路數:1 比率 - 輸入:輸出:1:1 差分 - 輸入:輸出:無/無 頻率 - 最大:1GHz 除法器/乘法器:是/無 電源電壓:4.5 V ~ 5.5 V 工作溫度:-20°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-LSSOP(0.175",4.40mm 寬) 供應商設備封裝:16-SSOP 包裝:帶卷 (TR) 其它名稱:NJW1504V-TE1-NDNJW1504V-TE1TR
主站蜘蛛池模板: 山阳县| 潜江市| 额敏县| 威宁| 调兵山市| 方正县| 高尔夫| 金塔县| 化州市| 遂川县| 英吉沙县| 铜鼓县| 祥云县| 太湖县| 会东县| 新巴尔虎右旗| 木里| 勃利县| 开江县| 财经| 东海县| 沅江市| 封开县| 富蕴县| 大名县| 额济纳旗| 清水河县| 瑞金市| 北安市| 五寨县| 岳西县| 玉屏| 宣威市| 卫辉市| 宜丰县| 玛沁县| 西林县| 临猗县| 烟台市| 彰化市| 潮州市|