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參數資料
型號: AD9898KCPRL-20
廠商: ANALOG DEVICES INC
元件分類: 消費家電
英文描述: TVPS00RF-21-41S W/ PC CON
中文描述: SPECIALTY CONSUMER CIRCUIT, QCC48
封裝: MO-220-VKKD-2, LFCSP-48
文件頁數: 37/52頁
文件大小: 557K
代理商: AD9898KCPRL-20
REV. 0
AD9898
–37–
Table XXI. SUBCK Registers
Bit
Width
Reference
Counter
Register Name
Register Type
Range
Description
SUBCKNUM
SUBCKSUPPRESS
11
1
Control (Addr 0x0B)
Control (Addr 0x01)
0–2047 Pulses
0–1 Pulse
Number of SUBCK Pulses per Field
Suppress First SUBCK after Last VSG
Line Pulse
SUBCK Output Enable Control
(0 = Disable, 1 = Enable)
High Speed Shutter Mode Operation
High Speed Shutter SUBCLK
Position/Number
SUBCLK1 First Toggle Position
SUBCLK1 Second Toggle Position
SUBCLK2 First Toggle Position
SUBCLK2 Second Toggle Position
(0 = SUBCK1, 1 = SUBCK2)
SUBCK_EN
1
Control (Addr 0x0B)
SUBCKMODE_HP
SUBCKNUM_HP
1
3
Control (Addr 0x01)
Control (Addr 0x0B)
0–7 Pulses
SUBCK1TOG1
SUBCK1TOG2
SUBCK2TOG1
SUBCK2TOG2
SUBCKSEL
9
9
9
9
1
System_Reg(14)
System_Reg(14)
System_Reg(15)
System_Reg(15)
Mode_Reg(2)
OL-Counter
OL-Counter
OL-Counter
OL-Counter
0–511 Pixel Location
0–511 Pixel Location
0–511 Pixel Location
0–511 Pixel Location
ELECTRONIC SHUTTER TIMING CONTROL
CCD image exposure time is controlled through the use of the
CCD substrate clock signal (SUBCK), which pulses the CCD
substrate to clear out accumulated charge prior to the exposure
period. The AD9898 supports three types of electronic shutter-
ing: normal shutter mode, suppression shutter mode, and high
speed shutter mode. Table XXI contains the registers required
for programming SUBCK pulses for each of these modes.
Normal Shutter Mode
Figure 37 shows the VD and SUBCK output for normal shutter
mode. The SUBCK will pulse once per line. The number of
SUBCK pulses per field can be programmed by setting register
SUBCKNUM (Addr 0x0B). As shown in Figure 37, the SUBCK
pulses will always begin on the line after the sensor gate occurs,
specified by VSGACTLINE (Mode_Reg(1)).
SUBCK Suppression Mode
Normally the SUBCKs will begin to pulse on the line following
the last sensor gate line (VSG). With some CCDs, the first
SUBCK following the VSG line needs to be suppressed. The
SUBCKSUPPRESS register allows for this suppression. The
first SUBCK following the last VSG pulse is suppressed when
SUBCKSUPPRESS = 1, as shown in Figure 38.
High Precision Shutter Mode
The high speed shutter mode can be operated in two differ-
ent modes, single pulse and multiple pulse. These modes are
set up by programming the SUBCKNUM_HP register and
SUBCKMODE_HP register, as described in Table XXII and
shown in Figures 40 and 41.
Single Pulse Mode
In addition to the normal operating SUBCK pulse, one addi-
tional SUBCK pulse can be applied within the HD line while
operating in this mode. As shown in Figure 37, the location
of the additional SUBCK pulse is adjusted by setting the
SUBCKNUM_HP register as described in Table XXII. Finer
resolution of the exposure time is possible using this mode by
adding a SUBCK pulse in the line, as shown in Figure 40.
Multiple Pulse Mode
In addition to the normal operating SUBCK pulse, up to seven
sequential SUBCK pulses can be applied within the same line
while operating in this mode. As shown in Figure 41, the
number of additional SUBCK pulses is selectable by setting
SUBCKMODE_HP = 1 and the SUBCKNUM_HP registers
as described in Table XXII.
Table XXII. Single and Multiple Pulse Mode
SUBCKMODE_HP
0
1
Single Pulse
Mode
Multiple Pulse
Mode
SUBCKNUM_HP
0
Normal Shutter
Mode Operation
Normal Shutter
Mode Operation
1
Position No. 1
1 Additional Pulse
2
Position No. 2
2 Additional Pulses
3
Position No. 3
3 Additional Pulses
4
Position No. 4
4 Additional Pulses
5
Position No. 5
5 Additional Pulses
6
Position No. 6
6 Additional Pulses
7
Position No. 7
7 Additional Pulses
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