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參數資料
| 型號： | AD9898KCPRL-20 |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 消費家電 |
| 英文描述： | TVPS00RF-21-41S W/ PC CON |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, QCC48 |
| 封裝： | MO-220-VKKD-2, LFCSP-48 |
| 文件頁數： | 49/52頁 |
| 文件大小： | 557K |
| 代理商： | AD9898KCPRL-20 |
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REV. 0
AD9898
–49–
HORIZONTAL TIMING SEQUENCE EXAMPLE
Figure 54 shows a sample CCD layout. The horizontal register
contains 28 dummy pixels, which will occur on each line clocked
from the CCD. In the vertical direction, there are 10 optical
black (OB) lines at the front of the readout and two at the back.
The horizontal direction has four OB pixels in the front and 48
in the back.
To configure the AD9898 horizontal signals for this CCD, three
sequences can be used. Figure 55 shows the first sequence to be
used during vertical blanking. During this time, there are no
EFFECTIVE IMAGE AREA
USE SEQUENCE 2
SEQUENCE 2 (OPTIONAL)
HORIZONTAL CCD REGISTER
4 OB PIXELS
48 OB PIXELS
28 DUMMY PIXELS
USE SEQUENCE 3
2 VERTICAL OB LINES
10 VERTICAL OB LINES
H
V
Figure 54. Sample CCD Configuration
SEQUENCE 1: VERTICAL BLANKING
INVALID PIX
VERTICAL SHIFT
DUMMY
INVALID PIXELS
VERT SHIFT
CDIN
SHP
SHD
H1
H2
HD
CLPOB
CLPOB PULSE MAY BE USED DURING HORIZONTAL DUMMY PIXELS
IF THE H-CLOCKS ARE USED DURING VERTICAL BLANKING.
Figure 55. Horizontal Sequence during Vertical Blanking
valid OB pixels from the sensor, so the CLPOB is not used. In
some cases, if the horizontal clocks are used during this time,
the CLPOB signal may be used to keep the AD9898’s clamp
partially settled.
Figure 56 shows the recommended sequence for the vertical OB
interval. The clamp signal is used across the whole line in order
to stabilize the clamp loop of the AD9898. Figure 57 shows the
recommended sequence for the effective pixel readout. The 48 OB
pixels at the end of each line are used for the CLPOB signal.
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