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參數(shù)資料
| 型號： | AD9898KCPRL-20 |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | TVPS00RF-21-41S W/ PC CON |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, QCC48 |
| 封裝： | MO-220-VKKD-2, LFCSP-48 |
| 文件頁數(shù)： | 46/52頁 |
| 文件大小： | 557K |
| 代理商： | AD9898KCPRL-20 |
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REV. 0
–46–
AD9898
1
2
4
5
6
7
ODD FIELD
EVEN FIELD
1H
t
DELAY3
t
SETTLING4
t
PWR
H1, V1, V2, V3, VSG1, VSG2, VSUB, SUBCK, FD
VDD
(INPUT)
VD
(OUTPUT)
DIGITAL
OUTPUTS
CLI
(INPUT)
HD
(OUTPUT)
SERIAL
WRITES
OUTCONT
1
(INTERNAL
SIGNAL)
NOTES
1
OUTCONT IS AN INTERNAL SIGNAL CONTROLLED USING REGISTER OUTCONT_REG (ADDR 0x05).
2
DCLK2 WILL BE OUTPUT ON FD/DLCK2, PIN 16, PROVIDING REGISTER DCLK2SEL (ADDR 0xD5) = 1.
3
IT TAKES 11 CLI CLOCKS FROM WHEN OUTCONT GOES HIGH UNTIL VD, HD, AND DIGITAL OUTPUT DATAIS VALID.
4
THERE IS 500 s SETTLING TIME FROM WHEN THE DIGSTBY REGISTER IS SET TO WHEN THE DLCK1 IS STABLE.
1V
H2, RG, MSHUT, STROBE
DCLK1
(OUTPUT)
DCLK2
2
(OUTPUT)
ODD FIELD
8
9
10
Figure 51. Recommended Power-Up Sequence and Synchronization, Master Mode
POWER-UP
Recommended Power-Up Sequence for Master Mode
When the AD9898 is powered up, the following sequence is
recommended. (Refer to Figure 51 for each step.)
1. Turn on power supplies for AD9898.
2. Apply the CLI master clock input. CLI will be output on
DCLK2 (Pin 16) at this time.
3. Reset the internal AD9898 registers. Write a 0x000000 to
the SW_RESET register (Addr 0x00). This will set all
internal register values to their default values. (This step is
optional because an internal power-on reset circuit is
applied at power-up.)
4. Program the DIGSTBY and AFESTBY registers
(Addr 0x05) = 1, and program all other necessary control
registers.
5. Program system registers (Addr 0x14).
6. Program Mode_A registers (Addr 0x15).
7. Program Mode_B registers (Addr 0x16).
8. Program OUTCONT_REG register (addr 0x05) = 1.
(The internal OUTCONT signal will be asserted high at
this time and will enable the digital outputs.)
9. Program control register MODE (Addr 0x0A) = 0. This
selects Mode_A operation. (This step is optional because
the AD9898 defaults to Mode_A at initial power-up.)
10.
Program control register MODE (Addr 0x0A) = 1. This
selects Mode_B operation. Complete this write at least
four CLI cycles before start of the next field.
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