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參數資料
型號: AD9929
廠商: Analog Devices, Inc.
英文描述: CCD Signal Processor with Precision Timing Generator
中文描述: CCD信號處理器精確時序發生器
文件頁數: 17/64頁
文件大小: 558K
代理商: AD9929
AD9929
Table 11. Mode_B Register Map (Address 0x16)
Rev. A | Page 17 of 64
Register
Mode_Reg(0)
Mode_Reg(1)
Mode_Reg(2)
Mode_Reg(3)
Mode_Reg(4)
Mode_Reg(5)
Mode_Reg(6)
Mode_Reg(7)
Mode_Reg(8)
Content
(31:24)
(23:0)
(31:21)
(20:9)
8
7
(6:0)
31
(30:28)
(27:25)
(24:22)
(21:19)
(18:16)
15
14
13
12
11
(10:3)
(2:0)
(31:27)
(26:19)
(18:11)
(10:9)
(8:7)
(6:5)
(4:3)
(2:0)
(31:29)
(28:26)
(25:23)
(22:12)
(11:1)
0
(31:19)
(18:6)
(5:0)
(31:25)
(24:12)
(11:0)
31
(30:18)
(17:5)
(4:0)
(31:24)
(23:11)
(10:9)
(8:0)
Bit
Width
8
24
11
12
1
1
7
1
3
3
3
3
3
1
1
1
1
1
8
3
5
8
8
2
2
2
2
3
3
3
3
11
11
1
13
13
6
7
13
12
1
13
13
5
8
13
2
9
Default
(Decimal)
NA
NA
262
1139
1
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
3
0
0
0
0
0
988
1138
1078
958
1138
988
1228
1392
3
Register Name
Mode_B_addr
Mode_B_Number_N
VDLEN
HDLASTLEN
1
XVSGSEL1
XVSGSEL2
XVSGACTLINE
SUBCKSEL
VTPSEQPTR0
VTPSEQPTR1
VTPSEQPTR2
VTPSEQPTR3
VTPSEQPTR4
CLPEN0
CLPEN1
CLPEN2
CLPEN3
CLPEN4
SCP1
SCP2
SCP2
SCP3
SCP4
VTPSEL0
VTPSEL1
VTPSEL2
VTPSEL3
VTPREP0
VTPREP1
VTPREP2
VTPREP3
SVREP0
SVREP3
Unused
XV1SPAT_TOG3
XV1SPAT_TOG4
XV2SPAT_TOG3
XV2SPAT_TOG3
XV2SPAT_TOG4
XV3SPAT_TOG3
XV3SPAT_TOG3
XV3SPAT_TOG4
XV4SPAT_TOG3
XV4SPAT_TOG4
XV4SPAT_TOG4
SECONDVPOS
VPATSECOND
Unused
Register Description
Mode_B Address is (Address 0x16)
Number N Register Writes (0x000000 = Write All Registers)
VD Counter Value
Number of Pixels in Last Line (Gray Code Number)
XVSG1 Sequence Selector (See Table 35)
XVSG2 Sequence Selector (See Table 35)
XVSG Active Line
Select One of Two SUBCK Patterns
Vertical Transfer Sequence Region 0
Vertical Transfer Sequence Region 1
Vertical Transfer Sequence Region 2
Vertical Transfer Sequence Region 3
Vertical Transfer Sequence Region 4
CLPOB Output Control 1
CLPOB Output Control 2
CLPOB Output Control 3
CLPOB Output Control 4
CLPOB Output Control 5
Sequence Change Position 1
Sequence Change Position 2
Sequence Change Position 3
Sequence Change Position 4
Vertical Pattern Selection 0
Vertical Pattern Selection 1
Vertical Pattern Selection 2
Vertical Pattern Selection 3
Number of VTP0 Pulse Repetitions for Pattern 0
Number of VTP1 Pulse Repetitions for Pattern 1
Number of VTP2 Pulse Repetitions for Pattern 2
Number of VTP0 Pulse Repetitions for Pattern 3
Vertical Sweep Repetition Number for CCD Region 0
Vertical Sweep Repetition Number for CCD Region 3
XV1SPAT Toggle Position 3
XV1SPAT Toggle Position 4
XV2SPAT Toggle Position 3
XV2SPAT Toggle Position 4
XV3SPAT Toggle Position 3
XV3SPAT Toggle Position 4
XV4SPAT Toggle Position 3
XV4SPAT Toggle Position 4
Second V Pattern Output Position
Selected Second V-Pattern Group for VSG Active Line
1
Register value must be a gray code number (See Gray Code Registers section).
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