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參數資料
| 型號： | L84225 |
| 英文描述： | L84225 100BaseTX/FX/10BaseT Physical Layer Device technical manual 4/02 |
| 中文描述： | L84225 100BaseTX/FX/10BaseT物理層設備的技術手冊，4月2日 |
| 文件頁數： | 19/118頁 |
| 文件大小： | 890K |
| 代理商： | L84225 |
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Functional Description
Copyright 1999-2002 by LSI Logic Corporation. All rights reserved.
19 of 118
April, 2002
The collision output, COL, is asserted whenever the collision condition is
detected.
2.2.3 MII - 10Mbps
10 Mbps operation is identical to the 100 Mbps operation, except:
TXCLK and RXCLK clock frequency is 2.5 MHz.
TXER is ignored.
RXER is disabled and always held low.
Receive operation is modified as follows. On the receive side, when
the squelch circuit determines that invalid data is present on the TP
(Twisted Pair) inputs, the receiver is idle. During idle, RXCLK follows
TXCLK, RXD[3:0] is held low, and CRS and RXDV are deasserted.
When a start of packet is detected on the TP receive inputs, CRS is
asserted and the clock recovery process starts on the incoming TP
input data. After the receive clock has been recovered from the data,
the RXCLK is switched over to the recovered clock output and the
data valid signal RXDV is asserted on a falling edge of RXCLK. Once
RXDV is asserted, valid data is clocked out on RXD[3:0] on falling
edges of the RXCLK clock. The RXD[3:0] data has the same packet
structure as the TXD[3:0] data and is formatted as specified in IEEE
802.3 and shown in
Figure 3
. When the end of packet is detected,
CRS and RXDV are deasserted. CRS and RXDV also stay
deasserted as long as the channel is in the Link Fail State.
2.2.4 RMII - 100 Mbps
The RMII is a reduced pin count version of the MII defined by an industry
group, the RMII Consortium. The RMII is a two-bit-wide packet data
interface that operates at 50 Mhz. The L84225 meets all the RMII
requirements outlined in the RMII Consortium specifications and can
directly connect to any Ethernet controller that also complies with the
RMII specifications.
The RMII is similar to the MII, except:
The data path is two bits wide instead of four.
Transmit and receive data is passed over TXD[1:0] and RXD[1:0]
pins, respectively.
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相關代理商/技術參數 |
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|---|---|
| L84225/B1 | 制造商:LSI Corporation 功能描述: |
| L8446-04 | 制造商:HAMAMATSU 制造商全稱:Hamamatsu Corporation 功能描述:CW LASER DIODES |
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| L8446-07 | 制造商:HAMAMATSU 制造商全稱:Hamamatsu Corporation 功能描述:CW LASER DIODES |
| L8446-41 | 制造商:HAMAMATSU 制造商全稱:Hamamatsu Corporation 功能描述:CW LASER DIODES |
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