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參數資料
型號: L84225
英文描述: L84225 100BaseTX/FX/10BaseT Physical Layer Device technical manual 4/02
中文描述: L84225 100BaseTX/FX/10BaseT物理層設備的技術手冊,4月2日
文件頁數: 93/118頁
文件大小: 890K
代理商: L84225
Specifications
Copyright 1999-2002 by LSI Logic Corporation. All rights reserved.
93 of 118
April, 2002
5.6 AC Test Timing Conditions
Unless otherwise noted, all test conditions are as follows:
1.
T
A
= 0 to +70 C
V
DD
= 3.3 V 5%
25 MHz 0.01%
2.
3.
4.
REXT = 10K 1%,no load
5.
Input conditions:
All inputs:
tr,tf <= 10 ns, 20-80%
6.
Output Loading
TPOP/N:
REGDEF:
All other digital outputs:
Same as
Figure 11
or equivalent, 10 pF
1K pullup, 50 pF
25 pF
F
SDIL
SD/FXEN Input Low
Voltage
V
SD_THR
+50 mV
V
This spec applies when
device is connected to 5V
external fiber optic trans-
ceivers. V
SD_THR
is the
voltage applied to the
SD_THR pin and is spec’ed
by FSDTHR.
This spec applies when
device is connected to 3.3V
external fiber optic trans-
ceivers. SD_THR is tied to
GND.
This spec applies when
device is connected to 5V
external fiber optic trans-
ceivers. When interfacing to
3.3V fiber optic transceiv-
ers, SD_THR is tied to
GND.
For disabling fiber interface
VCC-
1.475
F
SDTHR
SD_THR Input
Voltage
VCC
–1.3 V
–10%
VCC
1.3 V
VCC
–1.3 V
+10%
V
F
DIS
Fiber Interface Dis-
able Voltage,
SD/FXEN Pin
Internal/External
Signal Detect Level
Select, SD_THR Pin
0.45
0.85
V
F
LVL
0.45
0.85
V
For selecting interface to
either 3.3V or 5 V external
fiber transceivers
Sym.
Parameter
Limit
Unit
Conditions
Min
Typ
Max
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相關代理商/技術參數
參數描述
L84225/B1 制造商:LSI Corporation 功能描述:
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