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參數資料
| 型號： | L84225 |
| 英文描述： | L84225 100BaseTX/FX/10BaseT Physical Layer Device technical manual 4/02 |
| 中文描述： | L84225 100BaseTX/FX/10BaseT物理層設備的技術手冊，4月2日 |
| 文件頁數： | 26/118頁 |
| 文件大小： | 890K |
| 代理商： | L84225 |
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26 of 118
April, 2002
L84225 Quad 100BaseTX/FX/10BaseT Phys. Layer Device - Technical Manual
Copyright 1999-2002 by LSI Logic Corporation. All rights reserved.
2.5.2 Data Recovery - 100 Mbps
Data recovery is performed by latching in data from the receive inputs
with the recovered clock extracted by the PLL. The data is then
converted from a single bit stream into a nibble widedone by latching in
valid data from the receiver with the recovered clock extracted by the
PLL. The data is then converted from a single bit stream into a nibble-
wide data word.
2.5.3 Clock Recovery - 10 Mbps
The clock recovery process for 10 Mbps mode is identical to the 100
Mbps mode, except:
The recovered clock frequency is a 2.5 MHz nibble clock.
The PLL is switched from TXCLK to the TP input when the squelch
indicates valid data.
The PLL locks onto the preamble signal in less than 12 transitions
(bit times).
Some of the preamble data symbols are lost while the PLL is locking
onto the preamble. However, the data receiver block recovers
enough preamble symbols to pass at least 6 nibbles of preamble to
the controller interface, as shown in
Figure 3
.
2.5.4 Data Recovery
The data recovery process for 10 Mbps mode is identical to the 100
Mbps mode, except, the recovered clock frequency is a 2.5 MHz nibble
clock. As mentioned in
Section 2.4.2, “Manchester Decoder - 10 Mbps,”
page 25
, the data recovery process inherently performs decoding of
Manchester encoded data from the TP inputs.
2.6 Scrambler
2.6.1 100 Mbps
100BaseTX requires scrambling to reduce the radiated emissions on the
twisted pair. The L84225 scrambler takes the encoded data from the
4B5B encoder, scrambles it per the IEEE 802.3 specifications, and sends
it to the TP transmitter. The scrambler circuitry of the L84225 is designed
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