- 您現在的位置：買賣IC網 > PDF目錄367493 > L84225 L84225 100BaseTX/FX/10BaseT Physical Layer Device technical manual 4/02 PDF資料下載
參數資料
| 型號： | L84225 |
| 英文描述： | L84225 100BaseTX/FX/10BaseT Physical Layer Device technical manual 4/02 |
| 中文描述： | L84225 100BaseTX/FX/10BaseT物理層設備的技術手冊，4月2日 |
| 文件頁數： | 83/118頁 |
| 文件大小： | 890K |
| 代理商： | L84225 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁當前第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁
Application Information
Copyright 1999-2002 by LSI Logic Corporation. All rights reserved.
83 of 118
April, 2002
4.9 Serial Port
4.9.1 General
The L84225 has an MI serial port to set all of the devices' configuration
inputs and read out the status outputs. Any external device that has an
IEEE 802.3 compliant MI interface can connect directly to the L84225
without any glue logic, as shown in
Figure 11
and
Figure 12
.
As described earlier, the MI serial port consists of five lines: MDC, MDIO,
and PHYAD[4:2]. However, only 2 lines, MDC and MDIO, are needed to
shift data in and out.
PHYAD[4:2] define the three most significant bits of the PHY address, as
described in
Section 4.9.3, “Serial Port Addressing,” page 83
.
4.9.2 Polling vs. Interrupt
The status output bits can be monitored by either polling the serial port
or with the interrupt output.
If polling is used, the registers can be read at regular intervals and the
status bits can be checked against their previous values to determine any
changes. To make polling simpler, all the registers can be accessed in a
single read or write cycle by setting the register address bits REGAD[4:0]
to 11111 and adding enough clocks to read out all the bits, provided the
multiple register access feature has been enabled.
4.9.3 Serial Port Addressing
The device address for the MI serial port is selected by connecting the
PHYAD[4:2] pins to the desired value. The PHYAD[1:0] addresses are
internally hardwired for each channel as shown in both
Table 6
and
Table 8
.
4.10 Unmanaged Port Configuration
The L84225 has configuration inputs which can “over-ride” the default
configuration state obtained on POWER-UP or RESET of the device.
Use of these pins ANEG, SPEED_[3:0], and DPLX_[3:0] allow selection
of Global AutoNegotiation, Individual Port Speed (10/100), and Individual
Port Duplex (Full/Half), by properly strapping these pins to VDD or VSS
相關PDF資料 |
PDF描述 |
|---|---|
| L84302 | L84302 Quad 100/10 Mbps 4-Port Ethernet Controller with RMON/SNMP Management Counters technical manual 4/02 |
| L8560 | Low-Power SLIC with Ringing |
| L8567 | SLIC for Peoples Republic of China Applications |
| L8567-32PLCC | Telecommunication IC |
| L8567-44PLCC | Telecommunication IC |
相關代理商/技術參數 |
參數描述 |
|---|---|
| L84225/B1 | 制造商:LSI Corporation 功能描述: |
| L8446-04 | 制造商:HAMAMATSU 制造商全稱:Hamamatsu Corporation 功能描述:CW LASER DIODES |
| L8446-06 | 制造商:HAMAMATSU 制造商全稱:Hamamatsu Corporation 功能描述:CW LASER DIODES |
| L8446-07 | 制造商:HAMAMATSU 制造商全稱:Hamamatsu Corporation 功能描述:CW LASER DIODES |
| L8446-41 | 制造商:HAMAMATSU 制造商全稱:Hamamatsu Corporation 功能描述:CW LASER DIODES |
發布緊急采購，3分鐘左右您將得到回復。