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參數資料
型號: L84225
英文描述: L84225 100BaseTX/FX/10BaseT Physical Layer Device technical manual 4/02
中文描述: L84225 100BaseTX/FX/10BaseT物理層設備的技術手冊,4月2日
文件頁數: 38/118頁
文件大小: 890K
代理商: L84225
38 of 118
April, 2002
L84225 Quad 100BaseTX/FX/10BaseT Phys. Layer Device - Technical Manual
Copyright 1999-2002 by LSI Logic Corporation. All rights reserved.
Event is detected, the idle pattern (two /I/I/ symbols) must be detected
before any new SSD’s can be sensed.
If the receiver is in the idle state and 10 consecutive code bits from the
receiver consist of a pattern that is neither /I/ I/ nor /J/K/ symbols but
does not contain at least 2 non contiguous 0's, the data is ignored and
the receiver stays in the idle state.
2.12.2 10 Mbps
Since the idle period in 10 Mbps mode is defined to be no data on the
TP inputs, then the start of packet for 10 Mbps mode is detected when
valid data is detected by the TP squelch circuit. When start of packet is
detected, CRS is asserted as described in
Section 2.2, “Controller
Interface,” page 16
. Refer to
Section 2.9.4, “Squelch - 10 Mbps,” page 32
,
for the algorithm for valid data detection.
2.13 End of Packet
2.13.1 100 Mbps
End of packet for 100 Mbps mode is indicated by an End of Stream
Delimiter (referred to as ESD). The ESD pattern consists of the two /T/R/
4B5B symbols inserted after the end of the packet, as defined in IEEE
802.3 Clause 24 and shown in
Table 3
and
Figure 2
.
The transmit ESD is generated by the 4B5B encoder and the /T/R/
symbols are inserted by the 4B5B encoder after the end of the transmit
data packet, as shown in
Figure 2
.
The receive ESD pattern is detected by the 4B5B decoder by examining
groups of 10 consecutive code bits (two 5B words) from the descrambler
during valid packet reception to determine whether there is an ESD.
If the 10 consecutive code bits from the receiver during valid packet
reception consist of the /T/R/ symbols, the end of packet is detected,
data reception is terminated, CRS and RXDV are deasserted, and /I/I/
symbols are substituted in place of the /T/R/ symbols.
If 10 consecutive code bits from the receiver during valid packet
reception do not consist of /T/R/ symbols, but consist of /I/I/ symbols
instead, the packet is considered to have been terminated prematurely
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相關代理商/技術參數
參數描述
L84225/B1 制造商:LSI Corporation 功能描述:
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